Patents by Inventor James E. Breisch
James E. Breisch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7024565Abstract: A circuit includes a capacitor formed with a dielectric including the dielectric encasing elements of the circuit. A detector detects changes in the capacitance of the capacitor.Type: GrantFiled: December 17, 1999Date of Patent: April 4, 2006Assignee: Intel CorporationInventors: Mark A. Beiley, James E. Breisch
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Patent number: 6806569Abstract: A mechanism is provided for delivering power to an on-die component (such as a buffer circuit). This may include a package unit having a low frequency delivery path and a high frequency delivery path and a die having the on-die component and a capacitive device each coupled in parallel between a first node and a second node. The die may further include a low frequency reception path and a high frequency reception path. The low frequency reception path may couple to the low frequency delivery path on the package unit and to the first node. The high frequency reception path may couple to the high frequency delivery path on the package unit and to the first node. The high frequency reception path may include a damping resistor.Type: GrantFiled: September 28, 2001Date of Patent: October 19, 2004Assignee: Intel CorporationInventors: James E. Breisch, Mark A. Beiley
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Publication number: 20040183171Abstract: A mechanism is provided for delivering power to an on-die component (such as a buffer circuit). This may include a package unit having a low frequency delivery path and a high frequency delivery path and a die having the on-die component and a capacitive device each coupled in parallel between a first node and a second node. The die may further include a low frequency reception path and a high frequency reception path. The low frequency reception path may couple to the low frequency delivery path on the package unit and to the first node. The high frequency reception path may couple to the high frequency delivery path on the package unit and to the first node. The high frequency reception path may include a damping resistor.Type: ApplicationFiled: September 28, 2001Publication date: September 23, 2004Inventors: James E. Breisch, Mark A. Beiley
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Patent number: 6697112Abstract: An imaging system includes an array of pixel sensors and a mode control circuit. The array of pixel sensors is adapted to furnish logarithmically encoded indications of light intensities during a first mode and furnish linearly encoded indications of the light intensities during a second mode. The mode control circuit is adapted to selectively place the array in one of the first and second modes. The imaging system may include more than one array, and the mode control circuit may configure one of the arrays. The imaging system may include a camera, for example, that includes the array(s) and mode control circuit.Type: GrantFiled: November 18, 1998Date of Patent: February 24, 2004Assignee: Intel CorporationInventors: Tonia G. Morris, Kevin M. Connolly, James E. Breisch
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Publication number: 20030164884Abstract: An imaging system includes an array of pixel sensors and a mode control circuit. The array of pixel sensors is adapted to furnish logarithmically encoded indications of light intensities during a first mode and furnish linearly encoded indications of the light intensities during a second mode. The mode control circuit is adapted to selectively place the array in one of the first and second modes. The imaging system may include more than one array, and the mode control circuit may configure one of the arrays. The imaging system may include a camera, for example, that includes the array(s) and mode control circuit.Type: ApplicationFiled: November 18, 1998Publication date: September 4, 2003Inventors: TONIA G. MORRIS, KEVIN M. CONNOLLY, JAMES E. BREISCH
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Patent number: 6410359Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area. For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: GrantFiled: March 26, 2001Date of Patent: June 25, 2002Assignee: Intel CorporationInventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa, Joseph W. Parks, Jr., Mark A. Beiley, Zong-Fu Li, Cory E. Weber, Shaofeng Yu
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Patent number: 6403394Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: GrantFiled: March 29, 2001Date of Patent: June 11, 2002Assignee: Intel CorporationInventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa
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Patent number: 6362695Abstract: A circuit includes a first oscillator having transistors to produce a first signal with random variations resulting from device channel resistance of the transistors.Type: GrantFiled: December 21, 1999Date of Patent: March 26, 2002Assignee: Intel CorporationInventors: Mark A. Beiley, James E. Breisch
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Patent number: 6306679Abstract: An embodiment of the invention is directed to a semiconductor photodiode made of a number of gate islands being spaced from each other and electrically insulated from each other by spacers. The spacers are formed above a p-n junction of the photodiode. The incident light is detected after it passes through the spacers and into a photosensitive region of the photodiode. The photodiode can be built using conventional metal oxide semiconductor (MOS) processes of the polysilicon-silicided gate or self-aligned types that use a lower doped drain (LDD) structure, without requiring an additional mask step that prevents the formation of the opaque silicide above the photosensitive semiconductor regions.Type: GrantFiled: May 5, 2000Date of Patent: October 23, 2001Assignee: Intel CorporationInventors: Jung S Kang, James E Breisch
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Publication number: 20010019851Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area. For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: ApplicationFiled: March 26, 2001Publication date: September 6, 2001Inventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa, Joseph W. Parks, Mark A. Beiley, Zong-Fu Li, Cory E. Weber, Shaofeng Yu
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Publication number: 20010019850Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: ApplicationFiled: March 29, 2001Publication date: September 6, 2001Inventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa
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Patent number: 6259145Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area. For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: GrantFiled: June 17, 1998Date of Patent: July 10, 2001Assignee: Intel CorporationInventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa
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Patent number: 6215165Abstract: Leakage current may be reduced in trench isolated semiconductor devices by providing a buffer between the trench isolation and an active area. For example, with a trench isolated photodiode, a buffer of opposite conductivity type may be provided between the trench and the diffusion that forms the p-n junction of the photodiode.Type: GrantFiled: May 12, 1999Date of Patent: April 10, 2001Assignee: Intel CorporationInventors: Kevin M. Connolly, Jung S. Kang, Berni W. Landau, James E. Breisch, Akira Kakizawa, Joseph W. Parks, Jr., Mark A. Beiley, Zong-Fu Li, Cory E. Weber, Shaofeng Yu
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Patent number: 6091093Abstract: An embodiment of the invention is directed to a semiconductor photodiode made of a number of gate islands being spaced from each other and electrically insulated from each other by spacers. The spacers are formed above a p-n junction of the photodiode. The incident light is detected after it passes through the spacers and into a photosensitive region of the photodiode. The photodiode can be built using conventional metal oxide semiconductor (MOS) processes of the polysilicon-silicided gate or self-aligned types that use a lower doped drain (LDD) structure, without requiring an additional mask step that prevents the formation of the opaque silicide above the photosensitive semiconductor regions.Type: GrantFiled: June 1, 1999Date of Patent: July 18, 2000Assignee: Intel CorporationInventors: Jung S Kang, James E Breisch