Patents by Inventor James E. Fabiszak

James E. Fabiszak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10126335
    Abstract: A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: November 13, 2018
    Assignee: Panduit Corp.
    Inventors: Masud Bolouri-Saransar, James E. Fabiszak, Richard A. Rago
  • Patent number: 9921260
    Abstract: A system for testing electrical continuity of a device to a source wherein there is at least one conductor connecting the device to the source can include a reference capacitive load, an oscillator, and a microprocessor. The oscillator is selectively connected to the reference capacitive load and each conductor connecting the device to the source such that the frequency output of the oscillator is a function of the selected capacitive load of the oscillator. Each conductor connecting the device to the source is connected to the oscillator such that when each one is selectively connected, the output of the oscillator is a function of that conductor's parasitic self-capacitance. The microprocessor can then compare the frequency of the signal generated when each conductor is connected to the oscillator with the frequency of the signal generated when the reference capacitive load is connected.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: March 20, 2018
    Assignee: Panduit Corp.
    Inventors: Rachel M. Bugaris, John C. Senese, Craig T. Hoeppner, James E. Fabiszak, Richard A. Rago, Masud Bolouri-Saransar, Ronald A. Nordin, Nekheel S. Gajjar
  • Publication number: 20170269129
    Abstract: A system for the verification of the absence of voltage includes a first impedance, an amplitude limiter electrically connected to the first impedance, a second impedance electrically connected to the first impedance and the amplitude limiter, a varactor circuit electrically connected to the second impedance, an isolation capacitor electrically connected to the second impedance and varactor circuit, an envelope circuit with a voltage detection circuit connected to the isolation circuit via a buffer, and an RF oscillator. The amplitude limiter configured to limit the voltage applied to the varactor circuit. The RF oscillator configured to interact with the varactor circuit in order to create a modulated circuit for the buffer and envelope circuit. The envelope circuit is configured to demodulate the signal for the voltage detection circuit.
    Type: Application
    Filed: September 22, 2015
    Publication date: September 21, 2017
    Applicant: Panduit Corp.
    Inventors: Masud BOLOURI-SARANSAR, James E. FABISZAK, Richard A. RAGO
  • Publication number: 20160313386
    Abstract: A system for testing electrical continuity of a device to a source wherein there is at least one conductor connecting the device to the source can include a reference capacitive load, an oscillator, and a microprocessor. The oscillator is selectively connected to the reference capacitive load and each conductor connecting the device to the source such that the frequency output of the oscillator is a function of the selected capacitive load of the oscillator. Each conductor connecting the device to the source is connected to the oscillator such that when each one is selectively connected, the output of the oscillator is a function of that conductor's parasitic self-capacitance. The microprocessor can then compare the frequency of the signal generated when each conductor is connected to the oscillator with the frequency of the signal generated when the reference capacitive load is connected.
    Type: Application
    Filed: December 16, 2014
    Publication date: October 27, 2016
    Applicant: Panduit Corp.
    Inventors: Rachel M. Bugaris, John C. Senese, Craig T. Hoeppner, James E. Fabiszak, Richard A. Rago, Masud Bolouri-Saransar, Ronald A. Nordin, Nakheel S. Gajjar