Abstract: A solar array for collecting sunlight that is converted into electricity. The array includes an arrangement of solar collectors strategically positioned on a frame to maximize the amount of sunlight collected in relation to the size of the array. The collectors are plate like members with a reflective side and shaped so that sunlight collected by the reflective side is concentrated at a location away from the reflective side. The collectors are recumbently positioned in rows with their respective reflective sides directed away from the array frame. The collectors are spaced apart so that no collector casts shade on any part of another collector and substantially no sunlight between adjacent collectors.

Abstract: A solar conversion system with a solar collector that is shaped to focus reflected sunlight along an area with a substantially constant flux density. The area shape can be resemble a rectangular, square, circular, or other shape. Included with the system is a solar conversion module having a photovoltaic cell that is alignable with the area. The cell converts the focused reflected sunlight into electrical energy when aligned with the area.

Abstract: An apparatus and methods are provided for controlling data communications across power lines. The apparatus preferably has a power line interface for interfacing with a power line so as to detect both a wide bandwidth data communications protocol being initiated across the power line and a narrow bandwidth data communications protocol being initiated across the power line synchronously with the power line mains frequency and so as to initiate either a wide bandwidth data communications protocol onto the power line or a narrow bandwidth data communications protocol onto the power line synchronously with the power line mains frequency. The narrow bandwidth of the narrow bandwidth data communications protocol preferably falls within the wide bandwidth of the wide bandwidth data communications protocol. An input wide and narrow bandwidth protocol receiver is positioned responsive to the power line interface for receiving either the wide bandwidth protocol or the narrow bandwidth protocol.

Abstract: Spread spectrum chirps (i.e., wideband frequency packets) are propagated on a local area network in a hostile communications environment, such as a powerline or a crowded radio frequency band. Chirps are self-synchronizing, data bit (or subdata bit) in length and detectable by all network nodes, to allow the contention resolution and collision detection needed to support carrier-sense based network protocols. A matched filter of the same time length and encoding sequence as the transmitted chirp provides the self-synchronized chirp reception at each receiver.

Abstract: Spread spectrum communication using direct sequences that approximate a swept frequency waveform in which successive square waves are formed by the chips making up the sequence, and in which the durations of the square waves extend over a plurality of chips, and in which the frequency of the square waves varies across at least a portion of the sequence. Information is encoded by varying the direction of the direct sequence, so that the sequence is transmitted as either a forward or a reverse frequency-swept sequence. The spectrum of the direct sequences is in a passband. The direct sequence biphase modulates a carrier (e.g., RF) to produce a spread-spectrum signal with two passbands centered about the frequency of the modulated carrier.

Abstract: Communication apparatus and method that includes generating a series of successive spread-spectrum chirp signals, which are progressively swept within a defined bandwidth. The chirps are divided into two frequency-swept portions, one beginning at an intermediate frequency within the bandwidth being swept to one end of the frequency range of the chirp, and a second beginning at the other end of the frequency range and being swept to the intermediate frequency. This has the effect of moving the frequency transition from the boundaries of the chirp to its center, with the result that the discontinuities introduced at the boundaries by phase reversals due to successive modulated chirps generate less out-of-band energy.

Abstract: Spread spectrum chirps (i.e., wideband frequency packets) are propagated on a local area network in a hostile communications environment, such as a powerline or a crowded radio frequency band. Chirps are self-synchronizing, data bit (or subdata bit) in length and detectable by all network nodes, to allow the contention resolution and collision detection needed to support carrier-sense based network protcols. A matched filter of the same time length and encoding sequence as the transmitted chirp provides the self-synchronized chirp reception at each receiver.

Abstract: A data transmission system is described wherein data in a plurality of constituent streams are received at a multiplexer, processed to form a single composite stream comprising time slots each carrying data from one constituent stream, transmitted in the composite stream over a communication link, and demultiplexed in a demultiplexer receiving the composite stream at the far end of the link to recover the original plurality of constituent streams in separate form. The system implements a protocol according to which a plurality of queues, each associated with one of the constituent streams and arranged and connected to receive and store data therefrom, are serviced by a sequence of time slots corresponding to a defined service sequence, the data in any one slot being derived from an associated queue, and being formed into codewords from a codeword set, with framing apparatus emitting terminator codewords to mark the ends of at least some slots.

Abstract: A system for resolving conflicts among processors for access to a memory to which the processors are connected by a first bus includes a number of logic circuits, one for each processor. Each logic circuit receives a number of inputs to determine when access to the memory can be had for its processor. These inputs include a memory use request made by the processor, a memory availability signal communicated to all the logic circuits over a second bus, and the longest available processor waiting time, communicated to all the logic circuits over a third bus.