Abstract: An intuitive precharge sequencing technique for improving memory access through elimination of delay time incurred through precharging during page mode access of DRAM type memory. Current and prior page address access request information is used to generate a prediction as to whether the next address request will cross a page boundary and, therefore, require precharging of a new page. The predicted new page is then precharged before access is requested. Further advantages are obtained by providing an enable/disable feature, which allows either software or hardware to initiate or deactivate the operation of the precharge request in association with current or historical operating characteristics for a particular processor or program tasks. Where desired or practical, multiple levels of predictive analysis are used to refine the accuracy of trend predictions.