Abstract: An optical sensor package with a substrate that supports a membrane carrying an optical sensor and through which radiation passes to impinge the sensor. The substrate has a first surface in which a cavity is defined, a second surface opposite the first surface, and a wall between the cavity and the second surface. The optical sensor is supported on the membrane, which is bonded to the substrate and spans the cavity in the substrate. A window is defined at the second surface of the substrate for enabling infrared radiation to pass through the wall of the substrate to the optical sensor.

Abstract: A method of processing a wafer, and particularly a cap wafer configured for mating with a device wafer in the production of a die package. Masking layers are deposited on oxide layers present on opposite surfaces of the wafer, after which the masking layers are etched to expose regions of the underlying oxide layers. Thereafter, an oxide mask is formed on the exposed regions of the oxide layers, but is prevented from forming on other regions of the oxide layers masked by the masking layers. The masking layers are then removed and the underlying regions of the oxide layers and the wafer are etched to simultaneously produce through-holes and recesses in the wafer. The oxide mask is then removed to allow mating of the cap wafer with a device wafer.

Abstract: A method and apparatus for evaluating the functionality and sensitivity of an infrared sensor to infrared radiation. The method and apparatus are adapted for testing an infrared sensor having a diaphragm containing a heating element and a transducer that generates an output responsive to temperature. The method entails placing the infrared sensor in a controlled environment, and then exposing the diaphragm of the sensor to different levels of thermal radiation so as to obtain outputs of the transducer at different output levels. In the absence of exposure of the diaphragm to thermal radiation, flowing current through the heating element at different input levels so that the output of the transducer returns to the different output levels obtained using thermal radiation, the input difference between the input levels can be computed and used to assess the functionality and the sensitivity of the sensor.

Abstract: An optical sensor package capable of being surface mounted, and in a form that enables multiple packages to be fabricated simultaneously and then array tested in a wafer stack prior to singulation. The package comprises a chip carrier, a device chip electrically and mechanically connected to a first surface of the chip carrier with solder connections, and a capping chip secured to the chip carrier to hermetically enclose the device chip. The device chip has an optical sensing element on a surface thereof, while the capping chip has means for enabling radiation to pass therethrough to the device chip. The chip carrier includes conductive vias that are electrically connected to the solder connections of the device chip and extend through the chip carrier to bond pads on a second surface of the chip carrier, enabling the package to be surface mounted with solder connections to a suitable substrate.

Abstract: An infrared sensor including an absorber for absorbing incident infrared power to produce a signal representing the temperature of a target object, a frame supporting a membrane which carries the absorber, the frame including a plurality of reflecting surfaces disposed about the circumference of an opening over which the membrane spans for reflecting incident infrared power toward the absorber. By concentrating incident infrared power through reflection, the temperature difference between the absorber and the surrounding frame is increased, thereby producing an increased electrical output from the sensor.

Abstract: A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm.

Abstract: An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles.

Abstract: An integrated sensor comprising a thermopile transducer and signal processing circuitry that are combined on a single semiconductor substrate, such that the transducer output signal is sampled in close vicinity by the processing circuitry. The sensor comprises a frame formed of a semiconductor material that is not heavily doped, and with which a diaphragm is supported. The diaphragm has a first surface for receiving thermal (e.g., infrared) radiation, and comprises multiple layers that include a sensing layer containing at least a pair of interlaced thermopiles. Each thermopile comprises a sequence of thermocouples, each thermocouple comprising dissimilar electrically-resistive materials that define hot junctions located on the diaphragm and cold junctions located on the frame. The signal processing circuitry is located on the frame and electrically interconnected with the thermopiles.

Abstract: An optical sensor package capable of being surface mounted, and in a form that enables multiple packages to be fabricated simultaneously and then array tested in a wafer stack prior to singulation. The package comprises a chip carrier, a device chip electrically and mechanically connected to a first surface of the chip carrier with solder connections, and a capping chip secured to the chip carrier to hermetically enclose the device chip. The device chip has an optical sensing element on a surface thereof, while the capping chip has means for enabling radiation to pass therethrough to the device chip. The chip carrier includes conductive vias that are electrically connected to the solder connections of the device chip and extend through the chip carrier to bond pads on a second surface of the chip carrier, enabling the package to be surface mounted with solder connections to a suitable substrate.

Abstract: A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm.

Abstract: An infrared sensor including an absorber for absorbing incident infrared power to produce a signal representing the temperature of a target object, a frame supporting a membrane which carries the absorber, the frame including a plurality of reflecting surfaces disposed about the circumference of an opening over which the membrane spans for reflecting incident infrared power toward the absorber. By concentrating incident infrared power through reflection, the temperature difference between the absorber and the surrounding frame is increased, thereby producing an increased electrical output from the sensor.

Abstract: This invention includes a method of making a bridge-supported accelerometer structure. A first wafer is worked, preferably by bulk micromachining, to provide a proof mass supported by a thin membrane on all sides. The thin membrane has the same thickness as the bridges to be defined therein. The first wafer is bonded to a second wafer having a cavity formed therein. The first wafer is then worked, preferably by plasma etching, to delineate bridges in the thin membrane. The cavity in the second wafer provides damping of the proof mass which reduced bridge breakage as portions of the thin membrane are removed leaving the final bridge-supported accelerometer structure. Combining the two wafers together prior to delineating the bridge provides for handling and processing of a much less fragile structure than the first wafer alone with bridges delineated therein.

Abstract: This invention generally relates to the provision of a vent path during the bonding of silicon wafers and the subsequent encapsulation of the individual devices. A double-sided polished silicon wafer is used for the device wafer. The device wafer includes circuitry, thin membranes and metal interconnections. When bonding a bottom wafer to the device wafer, a vented path exists between the wafers. The venting path includes serpentine shape channel formed by interdigitated fingers and cavities. The cavity and the interdigitated patterns can be etched either together or separately into either wafer. A top wafer has a cavity formed therein. When the top device and bottom wafers are bonded together, the venting path is sealed by dipping the device in a sealing liquid. The serpentine path prevents the sealing liquid from reaching the cavity.

Abstract: A method is disclosed for forming thin, suspended membranes of epitaxial silicon material. Silicon oxide strips having a predetermined thickness are first formed on a silicon substrate. The gap, or spacing, between adjaceant beams is preferably less than or equal to about 1.4 times the thickness of the silicon oxide strip. The underlying silicon substrate is exposed within these gaps in the silicon oxide layer, thereby the gaps provide a seed hole for subsequent epitaxial growth from the silicon substrate. Epitaxial silicon is grown through the seed holes and then allowed to grow laterally over the silicon oxide strips to form a continuous layer of epitaxial silicon over the silicon oxide strips. The backside of the silicon substrate, or surface opposite the surface having the silicon oxide strips, is then masked to delineate the desired diaphragm and microbridge pattern. The silicon is etched conventionally from the backside.