Patents by Inventor James Holland

James Holland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210149763
    Abstract: Apparatuses including a graphics processing unit, graphics multiprocessor, or graphics processor having an error detection correction logic for cache memory or shared memory are disclosed. In one embodiment, a graphics multiprocessor includes cache or local memory for storing data and error detection correction circuitry integrated with or coupled to the cache or local memory. The error detection correction circuitry is configured to perform a tag read for data of the cache or local memory to check error detection correction information.
    Type: Application
    Filed: November 11, 2020
    Publication date: May 20, 2021
    Applicant: Intel Corporation
    Inventors: Vasanth Ranganathan, Joydeep Ray, Abhishek R. Appu, Nikos Kaburlasos, Lidong Xu, Subramaniam Maiyuran, Altug Koker, Naveen Matam, James Holland, Brent Insko, Sanjeev Jahagirdar, Scott Janus, Durgaprasad Bilagi, Xinmin Tian
  • Patent number: 11006127
    Abstract: An exemplary method for intelligent compression uses a foveated-compression approach. First, the location of a fixation point within an image frame is determined. Next, the image frame is sectored into two or more sectors such that one of the two or more sectors is designated as a fixation sector and the remaining sectors are designated as foveation sectors. A sector may be defined by one or more tiles within the image frame. The fixation sector includes the particular tile that contains the fixation point and is compressed according to a lossless compression algorithm. The foveation sectors are compressed according to lossy compression algorithms. As the locations of foveation sectors increase in angular distance from the location of the fixation sector, a compression factor may be increased.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 11, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Meghal Varia, Serag Gadelrab, Wesley James Holland, Joseph Cheung, Dam Backer, Tom Longo
  • Publication number: 20210125664
    Abstract: Systems, methods, and computer-readable media are provided for providing pose estimation in extended reality systems. An example method can include tracking, in a lower-power processing mode using a set of lower-power circuit elements on an integrated circuit, a position and orientation of a computing device during a lower-power processing period, the set of lower-power circuit elements including a static random-access memory (SRAM); suspending, based on a triggering event, the tracking in the lower-power processing mode; initiating a higher-power processing mode for tracking the position and orientation of the computing device during a higher-power processing period; and tracking, in the higher-power processing mode using a set of higher-power circuit elements on the integrated circuit and a dynamic random-access memory (DRAM), the position and orientation of the computing device during the higher-power processing period.
    Type: Application
    Filed: October 29, 2019
    Publication date: April 29, 2021
    Inventors: Wesley James HOLLAND, Mehrad TAVAKOLI, Injoon HONG, Huang HUANG, Simon Peter William BOOTH, Gerhard REITMAYR
  • Publication number: 20210105466
    Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.
    Type: Application
    Filed: December 18, 2020
    Publication date: April 8, 2021
    Applicant: Intel Corporation
    Inventors: Brinda Ganesh, Nilesh Jain, Sumit Mohan, Faouzi Kossentini, Jill Boyce, James Holland, Zhijun Lei, Chekib Nouira, Foued Ben Amara, Hassene Tmar, Sebastian Possos, Craig Hurst
  • Patent number: 10944987
    Abstract: An embodiment of a motion estimator apparatus may include technology to receive a compound message, and perform rate distortion estimation and check refinement for two or more coding unit descriptions for a source block based on the received compound message. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: March 9, 2021
    Assignee: Intel Corporation
    Inventors: Jason Tanner, Srinivasan Embar Raghukrishnan, James Holland
  • Publication number: 20210048478
    Abstract: This disclosure relates to monitoring the condition of electrical/electronic switches over time by monitoring the impedance of the switch. The condition of switches can degrade as they age, which can reduce their performance and may ultimately lead to failure. In many applications, particularly high-voltage applications, the reliable operation of switches may be very important and failures can present a safety risk and cause costly unscheduled system downtime for repairs. It has been realised that as the condition of switches change, their impedance changes, so monitoring the impedance can give a good indication of the condition of the switch, enabling potential faults/failures to be identified early and acted upon pre-emptively.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 18, 2021
    Inventors: Seyed Amir Ali Danesh, Jonathan Ephraim David Hurwitz, William Michael James Holland, Petre Minciunescu
  • Publication number: 20210049099
    Abstract: In one aspect, space in a tile-unaware cache associated with an address aperture may be managed in different ways depending on whether a processing component initiating an access request through the aperture to a tile-based memory is tile-unaware or tile-aware. Upon a full-tile read by a tile-aware process, data may be evicted from the cache, or space may not be allocated. Upon a full-tile write by a tile-aware process, data may be evicted from the cache. In another aspect, a tile-unaware process may be supplemented with tile-aware features by generating a full tile of addresses in response to a partial-tile access. Upon a partial-tile read by the tile-unaware process, the generated addresses may be used to pre-fetch data. Upon a partial-tile write, the addresses may be used to evict data. Upon a bit block transfer, the addresses may be used in dividing the bit block transfer into units of tiles.
    Type: Application
    Filed: August 16, 2019
    Publication date: February 18, 2021
    Inventors: ANDREW EDMUND TURNER, George PATSILARAS, Bohuslav RYCHLIK, Wesley James HOLLAND, Jeffrey SHABEL, Simon Peter William BOOTH
  • Patent number: 10845393
    Abstract: A measurement circuit is arranged to make several measurements, either at different times or in respect of different frequency components of currents measured by current sensors in respective phases of a multiphase supply system. The measurements are then used to correct for discrepancies in the transfer function of the sensors.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: November 24, 2020
    Assignee: Analog Devices International Limited Company
    Inventors: Jonathan Ephraim David Hurwitz, William Michael James Holland, Seyed Amir Ali Danesh
  • Patent number: 10839589
    Abstract: A mechanism is described for facilitating enhanced immersive media pipeline for correction of artifacts and clarity of objects in computing environments. An apparatus of embodiments, as described herein, includes one or more processors to extract semantic data relating to objects in a scene captured through one or more cameras, where the objects include distortions, and form, based on the semantic data, a three-dimensional (3D) model of contents of the scene, where the contents include the objects. The one or more processors are further to encode the 3D model including the contents and the semantic data into an encoded file having encoded contents and encoded semantic data and transmit the encoded file over an immersive media pipeline to facilitate correction of the distortions and rendering the scene including the objects without the distortions.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: November 17, 2020
    Assignee: INTEL CORPORATION
    Inventors: Gokcen Cilingir, Atsuo Kuwahara, Narayan Biswal, James Holland, Sang-Hee Lee, Jason Tanner, Mayuresh Varerkar, Kai Xiao
  • Patent number: 10821103
    Abstract: The present invention includes substituted pyridinone-containing tricyclic compounds, and compositions comprising the same, that can be used to treat or prevent hepatitis B virus (HBV) infection in a patient. In certain embodiments, the compounds and compositions of the invention inhibit and/or reduce HBsAg secretion.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: November 3, 2020
    Assignee: Arbutus Biopharma Corporation
    Inventors: Laurèn Danielle Bailey, Yingzhi Bi, Shuai Chen, Bruce D. Dorsey, Dimitar B. Gotchev, Richard James Holland, Ramesh Kakarla, Duyan Nguyen, Mark Christopher Wood
  • Publication number: 20200288152
    Abstract: A lossless pixel compressor may include technology to detect a format of a pixel memory region, and compress the pixel memory region together with embedded control information which indicates the detected format of the pixel memory region. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: December 5, 2017
    Publication date: September 10, 2020
    Applicant: INTEL CORPORATION
    Inventors: James Holland, Hiu-Fai Chan, Fangwen Fu, Qian Xu, Sang-Hee Lee, Vidhya Krishnan
  • Publication number: 20200261432
    Abstract: The present invention includes substituted pyridinone-containing tricyclic compounds, and compositions comprising the same, that can be used to treat or prevent hepatitis B virus (HBV) infection in a patient. In certain embodiments, the compounds and compositions of the invention inhibit and/or reduce HBsAg secretion.
    Type: Application
    Filed: March 30, 2020
    Publication date: August 20, 2020
    Applicant: Arbutus Biopharma Corporation
    Inventors: Laurèn Danielle Bailey, Yingzhi Bi, Shuai Chen, Bruce D. Dorsey, Dimitar B. Gotchev, Richard James Holland, Ramesh Kakarla, Duyan Nguyen, Mark Christopher Wood
  • Patent number: 10747671
    Abstract: An intelligent tile-based prefetching solution executed by a compression address aperture services linearly addressed data requests from a processor to memory stored in a memory component having a tile-based address structure. The aperture monitors tile reads and seeks to match the tile read pattern to a predefined pattern. If a match is determined, the aperture executes a prefetching algorithm uniquely and optimally associated with the predefined tile read pattern. In this way, tile overfetch is mitigated while the latency on first line data reads is reduced.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: August 18, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Wesley James Holland, Bohuslav Rychlik, Andrew Edmund Turner, George Patsilaras, Jeffrey Shabel, Simon Peter William Booth
  • Publication number: 20200250097
    Abstract: An intelligent tile-based prefetching solution executed by a compression address aperture services linearly addressed data requests from a processor to memory stored in a memory component having a tile-based address structure. The aperture monitors tile reads and seeks to match the tile read pattern to a predefined pattern. If a match is determined, the aperture executes a prefetching algorithm uniquely and optimally associated with the predefined tile read pattern. In this way, tile overfetch is mitigated while the latency on first line data reads is reduced.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 6, 2020
    Inventors: WESLEY JAMES HOLLAND, Bohuslav Rychlik, Andrew Edmund Turner, George Patsilaras, Jeffrey Shabel, Simon Peter William Booth
  • Publication number: 20200250101
    Abstract: An intelligent tile-based memory bandwidth management solution executed by an address aperture, such as a compression address aperture, services linearly addressed data requests (read requests and write requests) from a processor to data stored in a memory component having a tile-based address structure. For read requests, the aperture stores previously read tiles (full or partial) in a tile-aware cache and then seeks to service future read requests from the cache instead of the long-term memory component. For write requests, the aperture stores the write data in the tile-aware cache and assembles the data with write data from other write requests so that full tile data writes to the long-term memory may be achieved in lieu of excessive partial-tile writes.
    Type: Application
    Filed: February 6, 2019
    Publication date: August 6, 2020
    Inventors: GEORGE PATSILARAS, Wesley James Holland, Bohuslav Rychlik, Andrew Edmund Turner, Jeffrey Shabel, Simon Peter William Booth, Simo Petteri Kangaslampi, Christopher Koob, Wisnu Wurjantara, David Hansen, Ron Lieberman, Daniel Palermo, Colin Sharp, Hao Liu
  • Publication number: 20200179441
    Abstract: The present invention provides a composition or kit that dissolves in water to produce hydrogen rich water for use in increasing mitochondrial function and energy production. The composition or kit contains magnesium metal, i.e., elemental magnesium, an edible acid and either pyrroloquinoline quinone (PQQ) in any of its forms, a NAD+ precursor such as nicotinamide mononucleotide or nicotinamide riboside or a combination thereof. In water, the magnesium metal and edible acid react to produce magnesium ions and H2, which dissolves in the water.
    Type: Application
    Filed: April 27, 2018
    Publication date: June 11, 2020
    Inventors: Alexander TARNAVA, Richard James HOLLAND
  • Publication number: 20200096545
    Abstract: An apparatus is provided which substantially removes a perturbation signal from a pulse density modulated signal representing a combination of a signal to be measured and a perturbation applied to the signal to be measured. The removal of the perturbation is done by subtracting a correcting signal from the pulse density modulated signal. This approach introduces very little delay as it can be implemented by simple logic gates. It also provided enhanced immunity from the effects of bit errors.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 26, 2020
    Inventors: Long Wang, William Michael James Holland, Seyed Amir Ali Danesh
  • Publication number: 20200092564
    Abstract: An exemplary method for intelligent compression uses a foveated-compression approach. First, the location of a fixation point within an image frame is determined. Next, the image frame is sectored into two or more sectors such that one of the two or more sectors is designated as a fixation sector and the remaining sectors are designated as foveation sectors. A sector may be defined by one or more tiles within the image frame. The fixation sector includes the particular tile that contains the fixation point and is compressed according to a lossless compression algorithm. The foveation sectors are compressed according to lossy compression algorithms. As the locations of foveation sectors increase in angular distance from the location of the fixation sector, a compression factor may be increased.
    Type: Application
    Filed: September 30, 2019
    Publication date: March 19, 2020
    Inventors: MEGHAL VARIA, SERAG GADELRAB, WESLEY JAMES HOLLAND, JOSEPH CHEUNG, DAM BACKER, TOM LONGO
  • Publication number: 20200043217
    Abstract: A mechanism is described for facilitating enhanced immersive media pipeline for correction of artifacts and clarity of objects in computing environments. An apparatus of embodiments, as described herein, includes one or more processors to extract semantic data relating to objects in a scene captured through one or more cameras, where the objects include distortions, and form, based on the semantic data, a three-dimensional (3D) model of contents of the scene, where the contents include the objects. The one or more processors are further to encode the 3D model including the contents and the semantic data into an encoded file having encoded contents and encoded semantic data and transmit the encoded file over an immersive media pipeline to facilitate correction of the distortions and rendering the scene including the objects without the distortions.
    Type: Application
    Filed: July 31, 2018
    Publication date: February 6, 2020
    Applicant: Intel Corporation
    Inventors: GOKCEN CILINGIR, ATSUO KUWAHARA, NARAYAN BISWAL, JAMES HOLLAND, SANG-HEE LEE, JASON TANNER, MAYURESH VARERKAR, KAI XIAO
  • Publication number: 20200043182
    Abstract: Embodiments described herein provide an apparatus comprising a processor to divide a first point cloud data set frame representing a three dimensional space at a first point in time into a matrix of blocks, determine at least one three dimensional (3D) motion vector for at least a subset of blocks in the matrix of blocks, generate a predicted second point cloud data set frame representing a prediction of the three dimensional space at a second point in time by applying the at least one 3D motion vector to the subset of blocks in the matrix of blocks, compare the predicted second point cloud data set frame to a second point cloud data set frame representing a prediction of the three dimensional space at a second point in time to generate a prediction error parameter, and encode the second point cloud data set frame as a function of the first point cloud data set frame and the at least one three dimensional (3D) motion vector when the prediction error factor is beneath an error threshold to produce an encoded s
    Type: Application
    Filed: July 31, 2018
    Publication date: February 6, 2020
    Applicant: Intel Corporation
    Inventors: Scott Janus, Barnan Das, Hugues Labbe, Jong Dae Oh, Gokcen Cilingir, James Holland, Narayan Biswal, Yi-Jen Chiu, Qian Xu, Mayuresh Varerkar, Sang-Hee Lee, Stanley Baran, Srikanth Potluri, Jason Ross, Maruthi Sandeep Maddipatla