Abstract: Methods and devices addressing power tracking of transmission systems using antenna arrays are disclosed. The disclosed teachings may be implemented on a channel element to channel element basis, are adaptive and can be implemented on short time durations such as time slots. Power efficiency can be improved when applying the described methods to the design of systems with antenna arrays.

Abstract: A process of forming electronic device can include providing a substrate having a first portion and a second portion; introducing a nitrogen-containing species into the second portion of the substrate; and exposing the substrate to an oxidizing ambient, wherein a thicker oxide is grown from the first portion as compared to the second portion. In an embodiment, the process can include removing the first portion while the second portion of the substrate that includes the nitrogen-containing species remains. In another embodiment, the process can be used to form different thicknesses of an oxide layer at different portions along a sidewall of a trench. The process may be used in other applications where different thicknesses of oxide layers are to be formed during the same oxidation cycle, such as forming a tunnel dielectric layer and a gate dielectric layer for a floating gate memory cell.

Abstract: A process of forming electronic device can include providing a substrate having a first portion and a second portion; introducing a nitrogen-containing species into the second portion of the substrate; and exposing the substrate to an oxidizing ambient, wherein a thicker oxide is grown from the first portion as compared to the second portion. In an embodiment, the process can include removing the first portion while the second portion of the substrate that includes the nitrogen-containing species remains. In another embodiment, the process can be used to form different thicknesses of an oxide layer at different portions along a sidewall of a trench. The process may be used in other applications where different thicknesses of oxide layers are to be formed during the same oxidation cycle, such as forming a tunnel dielectric layer and a gate dielectric layer for a floating gate memory cell.

Abstract: The present disclosure provides a tank for containing fluids. The tank includes an elongated hollow body having an interior and an exterior, and an integrated internal support structure disposed on the interior of the elongated hollow body. The tank includes at least one feature formed along the exterior of the elongated hollow body that is adapted to receive an external component.

Abstract: Techniques for vaporizing and handling a vaporized metallic element or metallic element salt with a heated inert carrier gas for further processing. The vaporized metallic element or salt is carried by an inert carrier gas heated to the same temperature as the vaporizing temperature to a heated processing chamber. The metal or salt vapor may be ionized (and implanted) or deposited on substrates. Apparatus for accomplishing these techniques, which include carrier gas heating chambers and heated processing chambers are also provided.

Abstract: An electrostatic dust wand has a handle, a triboelectric charge generator, and a fibrous material. The triboelectric charge generator is coupled to the handle, and generates an electrostatic charge to attract dust particles to the cleaning implement. The fibrous material at least partially covers the triboelectric charge generator, to collect and to retain dust particles. The triboelectric charge generator has at least one movable member having a first triboelectric property, and an actuator for driving the at least one movable member. The electrostatic charge may be generated by movement of he at least one movable member against the fibrous material. Alternatively, or in addition, the electrostatic charge may be generated by relative movement of two members of the triboelectric charge generator against one another.

Abstract: Compositions, methods, apparatuses, kits, and combinations are described for permanently or temporarily re-designing, decorating, and/or re-coloring a surface. The compositions useful in the present disclosure include a décor product that is formulated to be applied and affixed to a surface. If desired, the décor product may be substantially removed from the surface before being affixed thereto. If a user desires to remove the décor product, the décor product is formulated to be removed by a number of methods including, for example, vacuuming, wet extraction, chemical application, and the like. If the user desires to affix the décor product to the surface in a permanent or semi-permanent manner, the décor product may be affixed to the surface by applying energy thereto in the form of, for example, heat, pressure, emitted waves, an emitted electrical field, a magnetic field, and/or a chemical.

Abstract: Compositions, methods, apparatuses, kits, and combinations are described for permanently or temporarily re-designing, decorating, and/or re-coloring a surface. The compositions useful in the present disclosure include a décor product that is formulated to be applied and affixed to a surface. If desired, the décor product may be substantially removed from the surface before being affixed thereto. If a user desires to remove the décor product, the décor product is formulated to be removed by a number of methods including, for example, vacuuming, wet extraction, chemical application, and the like. If the user desires to affix the décor product to the surface in a permanent or semi-permanent manner, the décor product may be affixed to the surface by applying energy thereto in the form of, for example, heat, pressure, emitted waves, an emitted electrical field, a magnetic field, and/or a chemical.

Abstract: Compositions, methods, apparatuses, kits, and combinations are described for permanently or temporarily re-designing, decorating, and/or re-coloring a surface. The compositions useful in the present disclosure include a décor product that is formulated to be applied and affixed to a surface. If desired, the décor product may be substantially removed from the surface before being affixed thereto. If a user desires to remove the décor product, the décor product is formulated to be removed by a number of methods including, for example, vacuuming, wet extraction, chemical application, and the like. If the user desires to affix the décor product to the surface in a permanent or semi-permanent manner, the décor product may be affixed to the surface by applying energy thereto in the form of, for example, heat, pressure, emitted waves, an emitted electrical field, a magnetic field, and/or a chemical.

Abstract: Compositions, methods, apparatuses, kits, and combinations are described for neutralizing a stain on a surface. The compositions useful in the present disclosure include a composition that is formulated to be applied and affixed to a surface. If desired, the composition may be substantially removed from the surface to remove a portion or substantially all of the stain before being affixed to the surface. If a user desires to remove the composition from the surface, the composition is formulated to be removed by a number of methods including, for example, vacuuming, wet extraction, chemical application, and the like. If the user desires to affix the composition to the surface in a permanent or semi-permanent manner, the composition may be affixed to the surface by applying energy thereto in the form of, for example, heat, pressure, emitted waves, an emitted electrical field, a magnetic field, and/or a chemical.

Abstract: Techniques for vaporizing and handling a vaporized metallic element or metallic element salt with a heated inert carrier gas for further processing. The vaporized metallic element or salt is carried by an inert carrier gas heated to the same temperature as the vaporizing temperature to a heated processing chamber. The metal or salt vapor may be ionized (and implanted) or deposited on substrates. Apparatus for accomplishing these techniques, which include carrier gas heating chambers and heated processing chambers are also provided.

Abstract: An electrostatic dust wand has a handle, a triboelectric charge generator, and a fibrous material. The triboelectric charge generator is coupled to the handle, and generates an electrostatic charge to attract dust particles to the cleaning implement. The fibrous material at least partially covers the triboelectric charge generator, to collect and to retain dust particles. The triboelectric charge generator has at least one movable member having a first triboelectric property, and an actuator for driving the at least one movable member. The electrostatic charge may be generated by movement of he at least one movable member against the fibrous material. Alternatively, or in addition, the electrostatic charge may be generated by relative movement of two members of the triboelectric charge generator against one another.

Abstract: An inventory management system is provided that includes an RFID interrogator and corresponding RFID tags that are placed on items to be monitored. The tags can be used to monitor the storage time of food items stored in a refrigerator or pantry, the time in use of replaceable items such as toilet bowl cleaners, or the nature of laundry items being washed. The interrogator can be coupled to a display providing various reports on the status of such items. Also disclosed are devices for dispensing such RFID tags.

Abstract: An automatic simulcast correction method (300) for a selective call receiver (100) includes the steps of measuring a received signal (304) for a received signal strength indication measurement and then determining if a protocol indicates a simulcast signal (310). If the received signal strength indication measurement is above a predefined threshold and the protocol indicates the simulcast signal, then the selective call receiver is optimized for simulcast delay spread distortion (312). If the received signal strength indication measurement is below a predefined threshold or the protocol does not indicate the simulcast signal, then the selective call receiver is optimized for static sensitivity (314).

Abstract: Lifetime of a short-channel NMOS device is increased by modifying distributions of electrically active LDD dopant at boundaries of the device's LDD regions. The LDD dopant distributions are modified by implanting counter-dopants at the boundaries of the LDD regions. Group III counter-dopants such as boron and group IV elements such as silicon alter activation properties of the LDD dopant. The dopant distributions are modified at the device's n-junctions to reduce the maximum electric field displacement at an interface defined by the device's gate and substrate. The dopant distributions can be further modified to shape the n-junctions such that hot carriers are injected away from the gate.

Abstract: Provided are methods for fabricating hardened composite thin layer gate dielectrics. According to preferred embodiments of the present invention, composite gate dielectrics may be produced as bilayers having oyxnitride portions with nitrogen contents above 10 atomic percent, while avoiding the drawbacks of prior art nitridization methods. In one aspect of the present invention, a hardened composite thin layer gate dielectric may be formed by deposition of a very thin silicon layer on a very thin oxide layer on a silicon substrate, followed by low energy plasma nitridization and subsequent oxidation of the thin silicon layer. In another aspect of the invention, low energy plasma nitridization of a thin oxide layer formed on a silicon substrate may be followed by deposition of a very thin silicon layer and subsequent oxidation, or additional low energy plasma nitridization and then oxidation, of the thin silicon layer.

Abstract: Provided is a method of fabricating gate dielectric layers having variable thicknesses and compositions over different regions of a semiconductor wafer. In a preferred embodiment of the present invention, a gate oxide layer is first grown over the various regions. Regions that are to have a relatively thicker, unhardened gate dielectric are masked and the wafer is exposed to a remote low energy nitrogen plasma. After the nitridization process is completed, the mask is removed and the wafer is exposed to further oxidation. The regions where oxynitrides have been formed act as a barrier to the oxidation process. Consequently, different oxide thicknesses can be grown on the same wafer, thinner and hardened where nitridization has been performed, and thicker and not hardened in those regions that were masked during the nitridization.

Abstract: A retrograde well in a CMOS device is formed by using a low energy ion implanter. Dopant atoms are implanted into a bare surface of the device's substrate, in a direction that is orthogonal to the surface of the substrate (for a substrate having a <100> orientation). The well implant can be performed at an energy below 220 keV. Chained implants for a punch-through barrier in the retrograde well can be performed after the well implant. When the substrate is annealed, the punch-through barrier is activated at the same time as the retrograde well.

Abstract: A process is disclosed for forming one or more doped regions beneath the surface of a single crystal semiconductor substrate, such as retrograde wells or deeper source/drain regions, by implantation at low energy which comprises orienting the crystal lattice of the semiconductor substrate, with respect to the axis of the implantation beam, i.e., the path of the energized atoms in the implantation beam, to maximize the number of implanted atoms which pass between the atoms in the crystal lattice. This results in the peak concentration of implanted atoms in the crystal lattice of the single crystal semiconductor substrate being deeper than the peak concentration of implanted atoms in the substrate would be if the axis of the implantation beam were not so oriented with respect to the crystal lattice of the semiconductor substrate during implantation.

Abstract: Formation of a barrier region in a single crystal group IV semiconductor substrate at a predetermined spacing from a doped region in the substrate is described to prevent or inhibit migration of dopant materials from an adjacent doped region through the barrier region. By implantation of group IV materials into a semiconductor substrate to a predetermined depth in excess of the depth of a doped region, a barrier region can be created in the semiconductor to prevent migration of the dopants from the doped region through the barrier region. The treatment of the single crystal substrate with the group IV material is carried out at a dosage and energy level sufficient to provide such a barrier region in the semiconductor substrate, but insufficient to result in amorphization (destruction) of the single crystal lattice of the semiconductor substrate.