Patents by Inventor James Krysl

James Krysl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240080154
    Abstract: Certain aspects of the present disclosure provide techniques for wireless communication by a first network entity. The techniques may generally involve generating a message with entries that represent blocks of physical resource blocks (PRBs), for transmitting reference signals over a fronthaul interface using modulation compression; transmitting the message to a second network entity via the fronthaul interface; and processing reference signals, transmitted in the blocks of PRBs on the fronthaul interface using modulation compression.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Shmuel VAGNER, Michael Francis GARYANTES, Senthilkumar SUNDARAM, Abhishek Saurabh SACHIDANAND SINHA, Shingyu KWAK, Deepak AGARWAL, James KRYSL
  • Publication number: 20240063851
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a radio unit may output capability information regarding a number of beamforming codebooks supported by the radio unit. The radio unit may obtain configuration information that configures one or more beamforming codebooks for an antenna array of the radio unit. The radio unit may communicate using the one or more beamforming codebooks. Numerous other aspects are described.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 22, 2024
    Inventors: Abhishek Saurabh SACHIDANAND SINHA, Deepak AGARWAL, Michael Francis GARYANTES, Rohan SALVI, Orod RAEESI, James KRYSL, Senthilkumar SUNDARAM, Kalyan KUPPUSWAMY
  • Patent number: 11889436
    Abstract: The transmission and reception group delay in a front end structure of a mobile device may be determined using closed loop calibration. The closed loop may be a near field radiated closed loop between pairs of antennas in an antenna array of the mobile device. The delay based on time of transmission and time of reception may be measured for a plurality of pairs of antennas, from which the transmit and receive group delay within a single path may be determined. The propagation delay of the signal between antennas may be included in the group delay calibration for increased accuracy. In another implementation, a conducted closed loop, e.g., in the transceiver or in a radio frequency switching network may be used to calibrate the group delay. Pre-characterization of the delay caused by components between the closed loop and antennas may be included in the group delay calibration for increased accuracy.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: January 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Jay King, Alexander Dorosenco, Muhammad Sayed Khairy Abdelghaffar, Joseph Binamira Soriaga, Carl Hardin, Alexandros Manolakos, James Krysl, Michael Allen Kongelf, Krishna Kiran Mukkavilli, Tingfang Ji, Joseph Patrick Burke
  • Publication number: 20230402766
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a radio unit (RU) may transmit, to a controller of the RU, a message including an ordered list of coordinates corresponding to a plurality of antenna elements in an antenna array of the RU. The RU may receive, from the controller, an indication of one or more low-level endpoints associated with one or more activated antenna elements of the plurality of antenna elements. Numerous other aspects are described.
    Type: Application
    Filed: March 24, 2023
    Publication date: December 14, 2023
    Inventors: Michael Francis GARYANTES, Abhishek Saurabh SACHIDANAND SINHA, Christian Oliver THELEN, Senthilkumar SUNDARAM, Orod RAEESI, James KRYSL, Luca BLESSENT, Deepak AGARWAL
  • Publication number: 20230217422
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a radio unit (RU) may receive, from a distributed unit (DU), a control plane message associated with a section type that is dedicated for slot level configuration information. The control plane message may include a common section header that identifies a group of one or more endpoints, and one or more section type commands that include information associated with a slot level common configuration for the group of one or more endpoints. The RU may perform at least one of radio frequency configuration or time domain beamforming for the group of one or more endpoints based at least in part on the information included in the one or more section type commands. Numerous other aspects are described.
    Type: Application
    Filed: December 20, 2022
    Publication date: July 6, 2023
    Inventors: Abhishek Saurabh SACHIDANAND SINHA, Senthilkumar SUNDARAM, Christian Oliver THELEN, Michael Francis GARYANTES, Deepak AGARWAL, Orod RAEESI, James KRYSL
  • Publication number: 20220095160
    Abstract: Aspects relate to provision of a control message, such as an extension data section, that includes an indication of the repeat of highest priority data sections. The control message may be generated in a distributed unit (DU) and conveyed to a radio unit (RU) via a fronthaul link The control message may include either a flag or bits in a field of an extension data section allowing a RU to determine repeat of the highest priority data section based on reception of the flag or processing of the bit value in the field. Additionally, the indication of repetition of the highest priority section may be based on a section identifier transmitted by a DU, wherein an RU receiving the section identifier may determine repeat of the highest priority data section by tracking the received section identifier.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 24, 2022
    Inventors: Christian Oliver THELEN, Senthilkumar SUNDARAM, Rohan SALVI, James KRYSL, Kenneth David EASTON
  • Publication number: 20220053435
    Abstract: The transmission and reception group delay in a front end structure of a mobile device may be determined using closed loop calibration. The closed loop may be a near field radiated closed loop between pairs of antennas in an antenna array of the mobile device. The delay based on time of transmission and time of reception may be measured for a plurality of pairs of antennas, from which the transmit and receive group delay within a single path may be determined. The propagation delay of the signal between antennas may be included in the group delay calibration for increased accuracy. In another implementation, a conducted closed loop, e.g., in the transceiver or in a radio frequency switching network may be used to calibrate the group delay. Pre-characterization of the delay caused by components between the closed loop and antennas may be included in the group delay calibration for increased accuracy.
    Type: Application
    Filed: August 17, 2020
    Publication date: February 17, 2022
    Inventors: Jay KING, Alexander Dorosenco, Muhammad Sayed Khairy ABDELGHAFFAR, Joseph Binamira SORIAGA, Carl HARDIN, Alexandros MANOLAKOS, James KRYSL, Michael Allen KONGELF, Krishna Kiran MUKKAVILLI, Tingfang JI, Joseph Patrick BURKE
  • Patent number: 7954016
    Abstract: Embodiments disclosed herein address the need in the art for an efficient multi-symbol deinterleaver. In one aspect, a plurality of memory banks are deployed to receive and simultaneously store a plurality of values, such as soft decision values determined from a modulation constellation, in accordance with a storing pattern. In another aspect, the storing pattern comprises a plurality of cycles, a selected subset of the plurality of memory banks and an address offset for use in determining the address for storing into the respective memory banks indicated for each cycle. In yet another aspect, the stored values may be accessed in order with a sequentially increasing index, such as an address. Various other aspects are also presented. These aspects have the benefit of allowing multiple symbol values to be deinterleaved in an efficient manner, thus meeting computation time constraints, and conserving power.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: May 31, 2011
    Assignee: Qualcomm Incorporated
    Inventors: Hanfang Pan, Inyup Kang, James Krysl
  • Publication number: 20100183096
    Abstract: Embodiments disclosed herein address the need in the art for an efficient multi-symbol deinterleaver. In one aspect, a plurality of memory banks are deployed to receive and simultaneously store a plurality of values, such as soft decision values determined from a modulation constellation, in accordance with a storing pattern. In another aspect, the storing pattern comprises a plurality of cycles, a selected subset of the plurality of memory banks and an address offset for use in determining the address for storing into the respective memory banks indicated for each cycle. In yet another aspect, the stored values may be accessed in order with a sequentially increasing index, such as an address. Various other aspects are also presented. These aspects have the benefit of allowing multiple symbol values to be deinterleaved in an efficient manner, thus meeting computation time constraints, and conserving power.
    Type: Application
    Filed: March 4, 2010
    Publication date: July 22, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Hanfang Pan, Inyup Kang, James Krysl
  • Patent number: 7702968
    Abstract: Embodiments disclosed herein address the need in the art for an efficient multi-symbol deinterleaver. In one aspect, a plurality of memory banks are deployed to receive and simultaneously store a plurality of values, such as soft decision values determined from a modulation constellation, in accordance with a storing pattern. In another aspect, the storing pattern comprises a plurality of cycles, a selected subset of the plurality of memory banks and an address offset for use in determining the address for storing into the respective memory banks indicated for each cycle. In yet another aspect, the stored values may be accessed in order with a sequentially increasing index, such as an address. Various other aspects are also presented. These aspects have the benefit of allowing multiple symbol values to be deinterleaved in an efficient manner, thus meeting computation time constraints, and conserving power.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: April 20, 2010
    Assignee: Qualcomm Incorporated
    Inventors: Hanfang Pan, Inyup Kang, James Krysl
  • Publication number: 20050190864
    Abstract: Embodiments disclosed herein address the need in the art for an efficient multi-symbol deinterleaver. In one aspect, a plurality of memory banks are deployed to receive and simultaneously store a plurality of values, such as soft decision values determined from a modulation constellation, in accordance with a storing pattern. In another aspect, the storing pattern comprises a plurality of cycles, a selected subset of the plurality of memory banks and an address offset for use in determining the address for storing into the respective memory banks indicated for each cycle. In yet another aspect, the stored values may be accessed in order with a sequentially increasing index, such as an address. Various other aspects are also presented. These aspects have the benefit of allowing multiple symbol values to be deinterleaved in an efficient manner, thus meeting computation time constraints, and conserving power.
    Type: Application
    Filed: February 27, 2004
    Publication date: September 1, 2005
    Inventors: Hanfang Pan, Inyup Kang, James Krysl