Abstract: A method for forming fin field effect transistors for complementary metal oxide semiconductor (CMOS) devices includes filling, with a dielectric fill, areas between fin structures formed on a substrate, the fin structures including a silicon layer formed on a SiGe layer; removing the SiGe layer of a first region of the fin structures by selectively etching the fin structures from the end portions of the fin structures to form voids; exposing the silicon layer of the fin structures in the first region and a second regions; and thermally oxidizing the SiGe layer in the second region, forming SiGe fins on a second dielectric material in the second region and silicon fins on the first dielectric material in the first region.

Abstract: A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material.

Abstract: A method for forming fin field effect transistors for complementary metal oxide semiconductor (CMOS) devices includes filling, with a dielectric fill, areas between fin structures formed on a substrate, the fin structures including a silicon layer formed on a SiGe layer; removing the SiGe layer of a first region of the fin structures by selectively etching the fin structures from the end portions of the fin structures to form voids; exposing the silicon layer of the fin structures in the first region and a second regions; and thermally oxidizing the SiGe layer in the second region, forming SiGe fins on a second dielectric material in the second region and silicon fins on the first dielectric material in the first region.

Abstract: A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon layer and the SiGe layer and filling between the fin structures with a dielectric fill. Trenches are formed to expose end portions of the fin structures. A first region of the fin structures is blocked off. The SiGe layer of the fin structures of a second region is removed by selectively etching the fin structures from the end portions to form voids, which are filled with dielectric material. The silicon layer of the fin structures is exposed. The SiGe layer in the first region is thermally oxidized to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.

Abstract: A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon layer and the SiGe layer and filling between the fin structures with a dielectric fill. Trenches are formed to expose end portions of the fin structures. A first region of the fin structures is blocked off. The SiGe layer of the fin structures of a second region is removed by selectively etching the fin structures from the end portions to form voids, which are filled with dielectric material. The silicon layer of the fin structures is exposed. The SiGe layer in the first region is thermally oxidized to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.

Abstract: Methods and structures for forming finFETs of different semiconductor composition and of different conductivity type on a same wafer are described. Some finFET structures may include strained channel regions. FinFETs of a first semiconductor composition may be grown in trenches formed in a second semiconductor composition. Material of the second semiconductor composition may be removed from around some of the fins at first regions of the wafer, and may remain around fins at second regions of the wafer. A chemical component from the second semiconductor composition may be driven into the fins by diffusion at the second regions to form finFETs of a different chemical composition from those of the first regions. The converted fins at the second regions may include strain.

Abstract: A substrate layer formed of a first semiconductor material includes adjacent first and second regions. Fin structures are formed from the substrate layer in both the first and second regions. At least the side walls of the fin structures in the second region are covered with an epitaxially grown layer of second semiconductor material. A drive in process is performed to convert the fin structures in the second region from the first semiconductor material to the second semiconductor material. The first semiconductor material is, for example, silicon, and the second semiconductor material is, for example, silicon germanium or silicon carbide. The fin structures in the first region are provided for a FinFET of a first (for example, n-channel) conductivity type while the fin structures in the second region are provided for a FinFET of a second (for example, p-channel) conductivity type.

Abstract: A method for forming fins includes growing a SiGe layer and a silicon layer over a surface of a bulk Si substrate, patterning fin structures from the silicon layer and the SiGe layer and filling between the fin structures with a dielectric fill. Trenches are formed to expose end portions of the fin structures. A first region of the fin structures is blocked off. The SiGe layer of the fin structures of a second region is removed by selectively etching the fin structures from the end portions to form voids, which are filled with dielectric material. The silicon layer of the fin structures is exposed. The SiGe layer in the first region is thermally oxidized to drive Ge into the silicon layer to form SiGe fins on an oxide layer in the first region and silicon fins on the dielectric material in the second region.

Abstract: A method for making a semiconductor device may include forming, above a substrate, a stack of alternating layers of first and second semiconductor materials. The second semiconductor material may be different than the first semiconductor material. The method may further include forming fins from the stack, with each fin having alternating layers of the first and second semiconductor materials, and selectively removing sidewall portions of the second semiconductor material from the fins to define recesses therein. The method may also include forming a dielectric material within the recesses, forming additional first semiconductor material on sidewall portions of the first semiconductor material in the fins, and forming a dielectric layer overlying the fins to define nanowires including the first semiconductor material within the dielectric layer.

Abstract: A substrate layer formed of a first semiconductor material includes adjacent first and second regions. Fin structures are formed from the substrate layer in both the first and second regions. At least the side walls of the fin structures in the second region are covered with an epitaxially grown layer of second semiconductor material. A drive in process is performed to convert the fin structures in the second region from the first semiconductor material to the second semiconductor material. The first semiconductor material is, for example, silicon, and the second semiconductor material is, for example, silicon germanium or silicon carbide. The fin structures in the first region are provided for a FinFET of a first (for example, n-channel) conductivity type while the fin structures in the second region are provided for a FinFET of a second (for example, p-channel) conductivity type.

Abstract: Methods and structures for forming finFETs of different semiconductor composition and of different conductivity type on a same wafer are described. Some finFET structures may include strained channel regions. FinFETs of a first semiconductor composition may be grown in trenches formed in a second semiconductor composition. Material of the second semiconductor composition may be removed from around some of the fins at first regions of the wafer, and may remain around fins at second regions of the wafer. A chemical component from the second semiconductor composition may be driven into the fins by diffusion at the second regions to form finFETs of a different chemical composition from those of the first regions. The converted fins at the second regions may include strain.

Abstract: A method for making a semiconductor device may include forming, above a substrate, a plurality of fins, forming a first semiconductor material on sides of a first group of the fins, and forming a second semiconductor material on sides of a second group of the fins. The method may further include forming a dielectric layer overlying the plurality of fins to define first and second groups of nanowires within the dielectric layer, with the first group of nanowires including the first semiconductor material and the second group of nanowires including the second semiconductor material.

Abstract: A method for making a semiconductor device may include forming, above a substrate, a stack of alternating layers of first and second semiconductor materials. The second semiconductor material may be different than the first semiconductor material. The method may further include forming fins from the stack, with each fin having alternating layers of the first and second semiconductor materials, and selectively removing sidewall portions of the second semiconductor material from the fins to define recesses therein. The method may also include forming a dielectric material within the recesses, forming additional first semiconductor material on sidewall portions of the first semiconductor material in the fins, and forming a dielectric layer overlying the fins to define nanowires including the first semiconductor material within the dielectric layer.

Abstract: A copper core used in electroformed metal (EFM) masks is replaced with a copper/molybdenum/copper clad core (Cu/Mo/Cu). The copper cladding on the molybdenum enhances adhesion of electroplated nickel. The nickel is electro-deposited through a patterned resist template onto the copper clad molybdenum surface. The copper and molybdenum are etched by selective etchants that do not attack other non-etched layers, leaving a patterned nickel stencil on a high-strength supporting base.

Abstract: A thin film transfer join process in which a multilevel thin film structure is formed on a carrier, the multilevel thin film structure is joined to a final substrate and then the carrier is removed. Once the carrier is removed, the dielectric material and metallic material that were once joined to the carrier are now exposed. The dielectric material is then etched back so that the exposed metallic material protrudes beyond the dielectric material. Also disclosed is a module made by the foregoing process.

Abstract: A thin film transfer join process in which a multilevel thin film structure is formed on a carrier, the multilevel thin film structure is joined to a final substrate and then the carrier is removed. Once the carrier is removed, the dielectric material and metallic material that were once joined to the carrier are now exposed. The dielectric material is then etched back so that the exposed metallic material protrudes beyond the dielectric material. Also disclosed is a module made by the foregoing process.