Patents by Inventor James L. Peterson

James L. Peterson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124923
    Abstract: A method of determining whether one or more forms of a nucleic acid analyte are present in a sample. The method includes dissolving an amplification reagent with a first solvent, where the amplification reagent contains oligonucleotides sufficient to amplify and detect a first region of a first form of the analyte, where the first solvent contains one or more oligonucleotides which, in combination with the oligonucleotides of the amplification reagent, are sufficient to amplify and detect a second region of a second form of the analyte, where the one or more oligonucleotides of the first solvent are insufficient to amplify and detect the first or second form of the analyte, and where the first and second regions each comprise a different nucleotide base sequence.
    Type: Application
    Filed: July 28, 2023
    Publication date: April 18, 2024
    Inventors: Patrick L. PETERSON, Jennifer L. TIDD, Anne-Laure SHAPIRO, Ankur H. SHAH, James T. TUGGLE, David OPALSKY, Alberto A. LIO, Timothy J. SCHEER, Jason F. RHUBOTTOM, David Aaron BUSE
  • Patent number: 11860070
    Abstract: At least a method and an apparatus are provided for collecting, processing and/or measuring of volatile organic chemicals (VOCs) in a sample, particularly in a solid sample which needs to be crushed for the VOCs to be released. A solid sample is placed into a reusable vial made of e.g., a material having a crushing strength of at least 4000 pounds per square inch. The reusable vial is capped using an external capping unit. The sample can be crushed directly in same reusable vial with an external crushing pestle placed through the capping unit to release a volatile organic compound contained in the solid sample. The volatile organic compound contained in the solid sample can then be extracted from the same reusable vial for an analysis of the volatile organic compound.
    Type: Grant
    Filed: May 19, 2023
    Date of Patent: January 2, 2024
    Inventor: James L. Peterson
  • Patent number: 9009716
    Abstract: Creating a thread of execution in a computer processor, including copying, as indicated by a hardware processor opcode having been specified by a user-level process, data from a first set of registers to a second set of registers, wherein the first set of registers is associated with a parent hardware thread, wherein the second set of registers is associated with a child hardware thread, wherein the child hardware thread is in a wait state, and changing, as indicated by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: April 14, 2015
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Patent number: 8893153
    Abstract: A first set of one or more hardware threads for receiving messages sent from hardware threads are registered. After receiving indications of a message location value and a number, the message location value is increments and sent to a different hardware thread of the first set of one or more hardware threads until the message location value has been incremented the number of times or a criterion for interrupting the incrementing and sending is satisfied. An actual number of times the message location value was incremented is indicated to a hardware thread that sent the indications of the message location value and the number.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Patent number: 8762126
    Abstract: Analyzing simulated operation of a computer including loading user-defined dynamically linked analysis libraries that each include specifications of events to be traced for analysis, including: executing, in separate hardware threads, one trace buffer handler for each analysis library, and associating, with each trace buffer handler, one or more analysis functions; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced and inserting, into the translation for each static instruction, a memory address of a separate static instruction buffer; executing the translation, including executing the implementing code and generating, in a trace buffer, one or more trace records for each specified event; and processing the trace buffer, including calling analysis functions and associating by the analysis functions through the separate static instruct
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: June 24, 2014
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Publication number: 20140040901
    Abstract: A first set of one or more hardware threads for receiving messages sent from hardware threads are registered. After receiving indications of a message location value and a number, the message location value is increments and sent to a different hardware thread of the first set of one or more hardware threads until the message location value has been incremented the number of times or a criterion for interrupting the incrementing and sending is satisfied. An actual number of times the message location value was incremented is indicated to a hardware thread that sent the indications of the message location value and the number.
    Type: Application
    Filed: October 11, 2013
    Publication date: February 6, 2014
    Applicant: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Patent number: 8572628
    Abstract: Inter-thread data communications in a computer processor with multiple hardware threads of execution, each hardware thread operatively coupled for communications through an inter-thread communications controller, where inter-thread communications is carried out by the inter-thread communications controller and includes: registering, responsive to one or more RECEIVE opcodes, one or more receiving threads executing the RECEIVE opcodes; receiving, from a SEND opcode of a sending thread, specifications of a number of derived messages to be sent to receiving threads and a base value; generating the derived messages, incrementing the base value once for each registered receiving thread so that each derived message includes a single integer as a separate increment of the base value; sending, to each registered receiving thread, a derived message; and returning, to the sending thread, an actual number of derived messages received by receiving threads.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: October 29, 2013
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Patent number: 8561365
    Abstract: A window assembly and method of constructing a window assembly is disclosed. The window assembly comprises a base frame assembly, an external cladding assembly, an interior trim assembly and a sash assembly. In one embodiment, the base frame assembly, external cladding assembly and interior trim assembly are constructed from one of three different types of materials. The external cladding assembly may also be snap-fit onto the base frame assembly. Further, the interior trim assembly can include a jamb extension assembly that can also be snap-fit onto the base frame assembly. The interior trim assembly may also include head, sill and side stop assemblies which can be push-fit onto the base frame assembly. Another aspect of the disclosure is a sash assembly that can be assembled as a snap-fit assembly.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: October 22, 2013
    Assignee: HWD Acquisition, Inc.
    Inventors: Scott D. Albrecht, Mark C. Hoffman, James L. Peterson
  • Patent number: 8561070
    Abstract: Creating a thread of execution in a computer processor includes an apparatus for copying data from a first set of registers to a second set of registers. The first set of registers is associated with a parent hardware thread and the second set of registers is associated with a child hardware thread. The copying is indicated by a hardware processor opcode called by a user-level process. The copying is performed with no operating system involvement. The child hardware thread is in a wait state. Creating the thread also includes changing, as indicated by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state. The ephemeral run state indicates a lack of operating system support structures for the child hardware thread.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Patent number: 8474189
    Abstract: A weather strip for use with a frame structure having a sharp corner, the weather strip comprising a stem portion and a bulb portion secured to a first end of the stem portion, where the bulb portion has a bulb wall comprising a soft thermoplastic elastomeric material.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: July 2, 2013
    Assignee: Intek Plastics, Inc.
    Inventors: James L. Peterson, Joel T. Rhode
  • Publication number: 20120216204
    Abstract: Creating a thread of execution in a computer processor, including copying, by a hardware processor opcode called by a user-level process, with no operating system involvement, register contents from a parent hardware thread to a child hardware thread, the child hardware thread being in a wait state, and changing, by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state.
    Type: Application
    Filed: April 27, 2012
    Publication date: August 23, 2012
    Applicant: International Business Machines Corporation
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Publication number: 20120173928
    Abstract: Analyzing simulated operation of a computer including loading user-defined dynamically linked analysis libraries that each include specifications of events to be traced for analysis, including: executing, in separate hardware threads, one trace buffer handler for each analysis library, and associating, with each trace buffer handler, one or more analysis functions; translating static binary instructions for the simulated computer into binary instructions for the executing computer, including: inserting, into the translation, implementing code for each specification of an event to be traced and inserting, into the translation for each static instruction, a memory address of a separate static instruction buffer; executing the translation, including executing the implementing code and generating, in a trace buffer, one or more trace records for each specified event; and processing the trace buffer, including calling analysis functions and associating by the analysis functions through the separate static instruct
    Type: Application
    Filed: January 5, 2011
    Publication date: July 5, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Publication number: 20120144395
    Abstract: Inter-thread data communications in a computer processor with multiple hardware threads of execution, each hardware thread operatively coupled for communications through an inter-thread communications controller, where inter-thread communications is carried out by the inter-thread communications controller and includes: registering, responsive to one or more RECEIVE opcodes, one or more receiving threads executing the RECEIVE opcodes; receiving, from a SEND opcode of a sending thread, specifications of a number of derived messages to be sent to receiving threads and a base value; generating the derived messages, incrementing the base value once for each registered receiving thread so that each derived message includes a single integer as a separate increment of the base value; sending, to each registered receiving thread, a derived message; and returning, to the sending thread, an actual number of derived messages received by receiving threads.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patrick J. Bohrer, Ahmed Gheith, James L. Peterson
  • Publication number: 20120144396
    Abstract: Creating a thread of execution in a computer processor, including copying, by a hardware processor opcode called by a user-level process, with no operating system involvement, register contents from a parent hardware thread to a child hardware thread, the child hardware thread being in a wait state, and changing, by the hardware processor opcode, the child hardware thread from the wait state to an ephemeral run state.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 7, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: PATRICK J. BOHRER, AHMED GHEITH, JAMES L. PETERSON
  • Publication number: 20090277111
    Abstract: A window assembly and method of constructing a window assembly is disclosed. The window assembly comprises a base frame assembly, an external cladding assembly, an interior trim assembly and a sash assembly. In one embodiment, the base frame assembly, external cladding assembly and interior trim assembly are constructed from one of three different types of materials. The external cladding assembly may also be snap-fit onto the base frame assembly. Further, the interior trim assembly can include a jamb extension assembly that can also be snap-fit onto the base frame assembly. The interior trim assembly may also include head, sill and side stop assemblies which can be push-fit onto the base frame assembly. Another aspect of the disclosure is a sash assembly that can be assembled as a snap-fit assembly.
    Type: Application
    Filed: April 28, 2009
    Publication date: November 12, 2009
    Inventors: Scott D. Albrecht, Mark C. Hoffman, James L. Peterson
  • Patent number: 7435038
    Abstract: A method and apparatus for stabilizing and lifting subsided slabs, flatwork, foundations of buildings or other structures, and, in particular, to the slab pier and bracket which are used in the repair and support of said subsided slabs, flatwork, foundations of building or other structures. In a specific embodiment, the subject method and apparatus can include a bracket, top piece, and pier column. In this embodiment, the subject apparatus can use these components as the means for lifting the subsided slab.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: October 14, 2008
    Inventor: James L. Peterson
  • Publication number: 20080078135
    Abstract: Provided is a grout member for a modular floor. The grout member includes a core having a wedge shape, wherein the core consists of a horizontal strut interconnecting two vertical supports. A flange extends from each vertical support to position and secure the grout member in position The core supports a surface section which is oriented toward the user.
    Type: Application
    Filed: August 15, 2007
    Publication date: April 3, 2008
    Inventors: Jonathan McIntosh, Theodore D. Kasel, James L. Peterson, Joel I. Rhode, Andrew A. Ross
  • Patent number: 7228660
    Abstract: The present invention includes a window jamb assembly mountable in a jamb of a double hung window for cooperative engagement with upper and lower sash assemblies. The window jamb assembly includes a jambliner that has inner and outer sash hardware accepting recesses and first and second weather-strip retaining recesses disposed between the sash hardware accepting recesses. First and second weather-strips are retained by the first and second weather-strip retaining recesses and cover strips are disposed in a remainder of the weather-strip recess that is not retaining a weather-strip. The cover strips have a facade portion that provides a visually pleasing finish.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: June 12, 2007
    Inventors: Joel T. Rhode, James L. Peterson, William D. Gribble
  • Patent number: 7163357
    Abstract: A method and apparatus for stabilizing and lifting subsided slabs, flatwork, foundations of buildings or other structures, and, in particular, to the slab pier and bracket which are used in the repair and support of said subsided slabs, flatwork, foundations of building or other structures. The apparatus is advantageous in situations where extra support is needed for raising the subsided slabs, flatwork, foundations or buildings or other structures. In a specific embodiment, the subject method and apparatus can include a bracket, top piece, and pier column. In this embodiment, the subject apparatus can use these components as the means for lifting the subsided slab.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: January 16, 2007
    Inventor: James L. Peterson
  • Patent number: 6840011
    Abstract: A window having a window panel that slides in a frame and at least one balancer that is secured to the window panel is disclosed. The window is of the tiltable hung type having a vertical operating position in which the balancer slides with the window panel in the frame and a tilted position in which the balancer remains secured to the window panel. The balancer includes an extensible member having a first end operatively coupled to the balancer and a second end operatively coupled to a frame so that the balancer can exert a force on the window panel to assist against the force of gravity when the window panel is in the vertical operating position. A method of constructing a tiltable hung window with a balancer secured to the window panel is also disclosed.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: January 11, 2005
    Assignee: Andersen Corporation
    Inventors: Roy A. Thompson, Douglas W. Kroncke, John C. Costello, David P. Chastain, Jack D. Gundlach, Timothy J. Kelley, Larry Versteeg, Thomas Hansel, Arthur R. King, IV, James R. Harger, Michael L. Doll, James L. Peterson, Dennis A. Galowitz, Richard M. Fischer