Patents by Inventor James M Higgins
James M Higgins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9779823Abstract: In a non-volatile memory system, a fast bulk secure erase method for erasing data includes, in response to a secure erase command: applying charge to a portion of non-volatile memory in the non-volatile memory system, and performing an erase operation sufficient to remove charge from the portion of non-volatile memory to below an erase threshold. The applied charge is sufficient to program memory cells in the portion of non-volatile memory to above a pre-erase program threshold.Type: GrantFiled: June 28, 2016Date of Patent: October 3, 2017Assignee: SanDisk Technologies LLCInventors: Jacob B. Schmier, Robert W. Ellis, James M. Higgins
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Patent number: 9747157Abstract: A method of operation of a data storage system includes: monitoring a data interface bus, the monitoring by a non-volatile memory controller; activating a zero bit counter for detecting a ratio of 1's to 0's on the data interface bus; and adjusting a threshold voltage (Vth), based on the ratio of the 1's to the 0's from the zero bit counter, by the non-volatile memory controller.Type: GrantFiled: November 8, 2013Date of Patent: August 29, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M. Higgins, Mark Dancho
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Patent number: 9715939Abstract: Systems and methods disclosed herein are used to efficiently manage low read data. In one aspect, a method includes, in response to detecting occurrence of a first event (e.g., PFail), writing low read data to non-volatile memory of a storage device with a fast SLC programming mode, distinct from a default SLC programming mode. Writing the low read data with the fast SLC programming mode: (i) includes using one or more memory programming parameters distinct from a default set of memory programming parameters used for writing data with the default SLC programming mode and (ii) takes less time per predefined unit of data than writing data with the default SLC programming mode. The method also includes: in response to detecting occurrence of a second event (e.g., host write command), writing data corresponding to the second event with the default SLC programming mode using the default set of memory programming parameters.Type: GrantFiled: October 28, 2015Date of Patent: July 25, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M. Higgins
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Publication number: 20170194052Abstract: In a non-volatile memory system, a fast bulk secure erase method for erasing data includes, in response to a secure erase command: applying charge to a portion of non-volatile memory in the non-volatile memory system, and performing an erase operation sufficient to remove charge from the portion of non-volatile memory to below an erase threshold. The applied charge is sufficient to program memory cells in the portion of non-volatile memory to above a pre-erase program threshold.Type: ApplicationFiled: June 28, 2016Publication date: July 6, 2017Inventors: Jacob B. Schmier, Robert W. Ellis, James M. Higgins
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Patent number: 9665295Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.Type: GrantFiled: August 26, 2016Date of Patent: May 30, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
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Patent number: 9652381Abstract: Systems, methods and/or devices are used to enable garbage collection of a sub-block of an individually erasable block of a storage medium in a storage device. In one aspect, the method includes determining a first trigger parameter in accordance with one or more operating conditions of a first sub-block of an erase block in the storage medium, and determining a second trigger parameter in accordance with one or more operating conditions of a second sub-block of the erase block in the storage medium. In accordance with a determination that the first trigger parameter meets a first vulnerability criterion, garbage collection of the first sub-block is enabled. Furthermore, in accordance with a determination that the second trigger parameter meets a second vulnerability criterion, garbage collection of the second sub-block is enabled.Type: GrantFiled: June 20, 2014Date of Patent: May 16, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: James M. Higgins, James Fitzpatrick, Mark Dancho
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Patent number: 9645744Abstract: A method of operation in a non-volatile memory system includes starting execution of a first memory operation from a first queue and in conjunction with starting a first timer, set to expire after a first predetermined time interval. The method further includes, in accordance with a determination that the first timer has expired, determining whether a second queue contains at least one memory operation for execution, and if so, suspending the first memory operation, executing a second memory operation from the second queue, and after completing execution of the second memory operation from the second queue, performing one or more subsequent operations (e.g., resuming execution of the first memory operation and restarting the first timer). In addition, the method includes, when the second queue does not contain at least one memory operation for execution, restarting the first timer, and continuing execution of the first memory operation from the first queue.Type: GrantFiled: January 16, 2015Date of Patent: May 9, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M. Higgins, Ryan R. Jones
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Patent number: 9606882Abstract: The disclosed method includes, at a storage controller of a storage system, receiving host instructions to modify configuration settings corresponding to a first memory portion of a plurality of memory portions. The method includes, in response to receiving the host instructions to modify the configuration settings, identifying the first memory portion from the host instructions and modifying the configuration settings corresponding to the first memory portion, in accordance with the host instructions. The method includes, after modifying the configuration settings corresponding to the first memory portion, sending one or more commands to perform memory operations having one or more physical addresses corresponding to the first memory portion and receiving a failure notification indicating failed performance of at least a first memory operation of the one or more memory operations. The method includes, in response to receiving the failure notification, executing one or more error recovery mechanisms.Type: GrantFiled: January 13, 2015Date of Patent: March 28, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Scott Creasman, James M. Higgins
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Patent number: 9582211Abstract: A method of operation in a non-volatile memory system for deferring, in accordance with a determination to reduce power consumption by the non-volatile memory system, execution of commands in a command queue corresponding to a distinct set of non-volatile memory devices during a respective wait period. In some implementations, the respective wait period for a first distinct set of non-volatile memory devices in at least two distinct sets is at least partially non-overlapping with the respective wait period for a second distinct set of non-volatile memory devices in the at least two distinct sets.Type: GrantFiled: December 16, 2014Date of Patent: February 28, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M. Higgins, Mark Dancho
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Patent number: 9575677Abstract: The various embodiments described herein include methods and/or systems for throttling power in a storage device. In one aspect, a method of operation in a storage system includes obtaining a power metric corresponding to a count of active memory commands in the storage system, where active memory commands are commands being executed by the storage system. The method further includes, in accordance with a determination that the power metric satisfies one or more power thresholds, deferring execution of one or more pending memory commands.Type: GrantFiled: December 16, 2014Date of Patent: February 21, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M Higgins, Mark Dancho, Ryan R. Jones
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Publication number: 20170047124Abstract: Systems and methods disclosed herein are used to efficiently manage low read data. In one aspect, a method includes, in response to detecting occurrence of a first event (e.g., PFail), writing low read data to non-volatile memory of a storage device with a fast SLC programming mode, distinct from a default SLC programming mode. Writing the low read data with the fast SLC programming mode: (i) includes using one or more memory programming parameters distinct from a default set of memory programming parameters used for writing data with the default SLC programming mode and (ii) takes less time per predefined unit of data than writing data with the default SLC programming mode. The method also includes: in response to detecting occurrence of a second event (e.g., host write command), writing data corresponding to the second event with the default SLC programming mode using the default set of memory programming parameters.Type: ApplicationFiled: October 28, 2015Publication date: February 16, 2017Inventors: Robert W. Ellis, James M. Higgins
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Patent number: 9543025Abstract: A storage control system, and a method of operation thereof, including: a power-down module for powering off a memory sub-system; a decay estimation module, coupled to the power-down module, for estimating a power-off decay rate upon the memory sub-system powered up, the power-off decay rate is for indicating how much data in the memory sub-system has decayed while the memory sub-system has been powered down; and a recycle module, coupled to the decay estimation module, for recycling an erase block for data retention based on the power-off decay rate.Type: GrantFiled: April 11, 2013Date of Patent: January 10, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: James Fitzpatrick, James M. Higgins, Bernardo Rub, Ryan Jones, Robert W. Ellis, Mark Dancho, Sheunghee Park
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Publication number: 20160364155Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.Type: ApplicationFiled: August 26, 2016Publication date: December 15, 2016Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
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Publication number: 20160313944Abstract: Methods, systems and/or devices are used for limiting write command execution in a storage device comprising a set of non-volatile memory devices. In one aspect, the method includes (1) accessing in a holding queue host-specified write commands specified by a host system, each of the host-specified write commands specifying a number of pages to be written to the set of non-volatile memory devices; (2) in accordance with a determination that throttling is enabled: (3) determining a limit number of pages for a current throttle period in accordance with a throttle rate, the throttle rate being a maximum write rate for executing host-specified write commands; and (4) during the current throttle period, moving from the holding queue to a pending queue, for execution by the set of non-volatile memory devices, host-specified write commands whose total specified number of pages does not exceed the limit number of pages.Type: ApplicationFiled: October 14, 2015Publication date: October 27, 2016Inventors: John G. Hodgdon, Ryan R. Jones, James M. Higgins
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Patent number: 9448946Abstract: Systems, methods and/or devices are used to enable a stale data mechanism. In one aspect, the method includes (1) receiving a write command specifying a logical address to which to write, (2) determining whether a stale flag corresponding to the logical address is set, (3) in accordance with a determination that the stale flag is not set, setting the stale flag and releasing the write command to be processed, and (4) in accordance with a determination that the stale flag is set, detecting an overlap, wherein the overlap indicates two or more outstanding write commands are operating on the same memory space.Type: GrantFiled: July 15, 2014Date of Patent: September 20, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: James M. Higgins, Theron W. Virgin
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Patent number: 9431113Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.Type: GrantFiled: July 17, 2014Date of Patent: August 30, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
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Patent number: 9361222Abstract: Systems, methods and/or devices are used to enable storage drive life estimation. In one aspect, the method includes (1) determining two or more age criteria of a storage drive, and (2) determining a drive age of the storage drive in accordance with the two or more age criteria of the storage drive.Type: GrantFiled: July 17, 2014Date of Patent: June 7, 2016Assignee: SMART STORAGE SYSTEMS, INC.Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, James M. Kresse
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Publication number: 20160026386Abstract: A method of operation in a non-volatile memory system includes starting execution of a first memory operation from a first queue and in conjunction with starting a first timer, set to expire after a first predetermined time interval. The method further includes, in accordance with a determination that the first timer has expired, determining whether a second queue contains at least one memory operation for execution, and if so, suspending the first memory operation, executing a second memory operation from the second queue, and after completing execution of the second memory operation from the second queue, performing one or more subsequent operations (e.g., resuming execution of the first memory operation and restarting the first timer). In addition, the method includes, when the second queue does not contain at least one memory operation for execution, restarting the first timer, and continuing execution of the first memory operation from the first queue.Type: ApplicationFiled: January 16, 2015Publication date: January 28, 2016Inventors: Robert W. Ellis, James M. Higgins, Ryan R. Jones
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Publication number: 20160019127Abstract: The disclosed method includes, at a storage controller of a storage system, receiving host instructions to modify configuration settings corresponding to a first memory portion of a plurality of memory portions. The method includes, in response to receiving the host instructions to modify the configuration settings, identifying the first memory portion from the host instructions and modifying the configuration settings corresponding to the first memory portion, in accordance with the host instructions. The method includes, after modifying the configuration settings corresponding to the first memory portion, sending one or more commands to perform memory operations having one or more physical addresses corresponding to the first memory portion and receiving a failure notification indicating failed performance of at least a first memory operation of the one or more memory operations. The method includes, in response to receiving the failure notification, executing one or more error recovery mechanisms.Type: ApplicationFiled: January 13, 2015Publication date: January 21, 2016Inventors: Scott Creasman, James M. Higgins
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Publication number: 20160019137Abstract: The embodiments described herein are used to allocate memory in a storage system. The method includes, at a memory controller in the storage system, determining a current memory allocation for a set of memory devices, wherein the set of memory devices is formatted with a ratio of first storage density designated portions to second storage density designated portions in accordance with the current memory allocation. The method further includes detecting satisfaction of one or more memory reallocation trigger conditions. The method further includes, in response to detecting satisfaction of one or more memory reallocation trigger conditions, modifying the ratio of the first storage density designated portions to the second storage density designated portions in the set of memory devices to generate a second memory allocation for the set of memory devices.Type: ApplicationFiled: January 16, 2015Publication date: January 21, 2016Inventors: Robert W. Ellis, James M. Higgins