Patents by Inventor James M. Holland

James M. Holland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180310113
    Abstract: Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Inventors: Joydeep Ray, Travis T. Schluessler, Prasoonkumar Surti, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, James M. Holland, Jeffery S. Boles, Jonathan Kennedy, Louis Feng, Atsuo Kuwahara, Barnan Das, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir, Nilesh V. Shah, Archie Sharma, Mayuresh M. Varerkar
  • Publication number: 20180308257
    Abstract: A system includes a camera to capture real world content and a semiconductor package apparatus. The semiconductor package apparatus includes a substrate and logic. The logic includes a graphics pipeline to generate rendered content, a base layer encoder to encode real world content into a base layer and a first layer encoder to encode rendered content into a first non-base layer, a multiplexer to interleave the base layer with the first non-base layer to obtain a single output signal having mixed reality content, and a transmitter to transmit the single output signal. The system further includes a second layer encoder to encode map data into a second non-base layer. The multiplexer to interleave the second non-base layer with the first non-base layer and the base layer. The first and second layer encoders encode the rendered content and the map data into overlay auxiliary pictures.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Inventors: Jill M. Boyce, Keith W. Rowe, James M. Holland, Fangwen Fu, Satya N. Yedidi, Sumit Mohan
  • Publication number: 20180299952
    Abstract: Systems, apparatuses and methods may provide away to enhance an augmented reality (AR) and/or virtual reality (VR) user experience with environmental information captured from sensors located in one or more physical environments. More particularly, systems, apparatuses and methods may provide a way to track, by an eye tracker sensor, a gaze of a user, and capture, by the sensors, environmental information. The systems, apparatuses and methods may render feedback, by one or more feedback devices or display device, for a portion of the environment information based on the gaze of the user.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 18, 2018
    Inventors: Altug Koker, Michael Apodaca, Kai Xiao, Chandrasekaran Sakthivel, Jeffery S. Boles, Adam T. Lake, James M. Holland, Pattabhiraman K, Sayan Lahiri, Radhakrishnan Venkataraman, Kamal Sinha, Ankur N. Shah, Deepak S. Vembar, Abhishek R. Appu, Joydeep Ray, Elmoustapha Ould-Ahmed-Vall
  • Publication number: 20180300839
    Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 18, 2018
    Inventors: Abhishek R. Appu, Stanley J. Baran, Sang-Hee Lee, Atthar H. Mohammed, Jong Dae Oh, Hiu-Fai R. Chan, Jill M. Boyce, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland, Keith W. Rowe, Altug Koker
  • Publication number: 20180300940
    Abstract: Systems, apparatuses and methods may provide away to render augmented reality and virtual reality (VR/AR) environment information. More particularly, systems, apparatuses and methods may provide a way to selectively suppress and enhance VR/AR renderings of n-dimensional environments. The systems, apparatuses and methods may deepen a user's VR/AR experience by focusing on particular feedback information, while suppressing other feedback information from the environment.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 18, 2018
    Inventors: Chandrasekaran Sakthivel, Michael Apodaca, Kai Xiao, Altug Koker, Jeffery S. Boles, Adam T. Lake, Nikos Kaburlasos, Joydeep Ray, John H. Feit, Travis T. Schluessler, Jacek Kwiatkowski, James M. Holland, Prasoonkumar Surti, Jonathan Kennedy, Louis Feng, Barnan Das, Narayan Biswal, Stanley J. Baran, Gokcen Cilingir, Nilesh V. Shah, Archie Sharma, Mayuresh M. Varerkar
  • Publication number: 20180293424
    Abstract: Systems, apparatuses, and methods may provide for technology to dynamically control a display in response to ocular characteristic measurements of at least one eye of a user.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 11, 2018
    Inventors: Radhakrishnan Venkataraman, James M. Holland, Sayan Lahiri, Pattabhiraman K, Kamal Sinha, Chandrasekaran Sakthivel, Daniel Pohl, Vivek Tiwari, Philip R. Laws, Subramaniam Maiyuran, Abhishek R. Appu, ElMoustapha Ould-Ahmed-Vall, Peter L. Doyle, Devan Burke
  • Publication number: 20180288435
    Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: April 1, 2017
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Jill M. Boyce, Sang-Hee Lee, Abhishek R. Appu, Wen-Fu Kao, Joydeep Ray, Ya-Ti Peng, Keith W. Rowe, Fangwen Fu, Satya N. Yedidi, Sumit Mohan, James M. Holland
  • Publication number: 20180284872
    Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: April 1, 2017
    Publication date: October 4, 2018
    Inventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, Kamal Sinha, James M. Holland, Pattabhiraman K., Sayan Lahiri, Radhakrishnan Venkataraman, Carson Brownlee, Vivek Tiwari, Kai Xiao, Jefferson Amstutz, Deepak S. Vembar, Ankur N. Shah, ElMoustapha Ould-Ahmed-Vall
  • Publication number: 20180288423
    Abstract: An embodiment of a graphics apparatus may include a focus identifier to identify a focus area, and a color compressor to selectively compress color data based on the identified focus area. Another embodiment of a graphics apparatus may include a motion detector to detect motion of a real object, a motion predictor to predict a motion of the real object, and an object placer to place a virtual object relative to the real object based on the predicted motion of the real object. Another embodiment of a graphics apparatus may include a frame divider to divide a frame into viewports, a viewport prioritizer to prioritize the viewports, a renderer to render a viewport of the frame in order in accordance with the viewport priorities, and a viewport transmitter to transmit a completed rendered viewport. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: April 1, 2017
    Publication date: October 4, 2018
    Applicant: Intel Corporation
    Inventors: Deepak S. Vembar, Atsuo Kuwahara, Chandrasekaran Sakthivel, Radhakrishnan Venkataraman, Brent E. Insko, Anupreet S. Kalra, Hugues Labbe, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, ElMoustapha Ould-Ahmed-Vall, James M. Holland
  • Publication number: 20180041770
    Abstract: An apparatus of video encoding is described herein. The apparatus includes an encoder and a hardware bit packing unit. The encoder comprises at least a fixed function dual hierarchical motion estimation search units, dual integer motion estimation search units, and a fractional motion estimation search unit. Moreover, the hardware bit packing unit is to pack bits as coded according to the final macroblock coding decision into a data format.
    Type: Application
    Filed: April 10, 2017
    Publication date: February 8, 2018
    Applicant: INTEL CORPORATION
    Inventors: James M. Holland, Fangwen Fu, Satya N. Yedidi, Srinivasan Embar Raghukrishnan
  • Publication number: 20180041766
    Abstract: A system for lossless pixel compression for random video memory access is described herein. The system includes an encoder and a decoder. The system also includes a memory that is to store instructions and that is communicatively coupled to the encoder and decoder. Further the system includes a processor. The processor is coupled to the camera, the display, and the memory. When the processor is to execute the instructions, the processor is to predict a data value based on values of local neighbors and generate an error term based on the predicted data value. The processor is also to losslessly compress a plurality of cachelines based on the error term and predictions.
    Type: Application
    Filed: January 23, 2017
    Publication date: February 8, 2018
    Applicant: Intel Corporation
    Inventors: James M. Holland, Scott W. Cheng
  • Patent number: 9838710
    Abstract: Techniques related to providing motion estimation for arbitrary pixel block shapes are discussed. Such techniques may include generating a distortion mesh for a pixel block based on multiple calls to a motion estimation such that the distortion mesh includes distortion values associated with regions of the pixel block, a seed motion vector, and candidate motion vectors, and determining a best motion vector for the pixel block based on the distortion mesh.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: December 5, 2017
    Assignee: Intel Corporation
    Inventors: Sang-Hee Lee, James M. Holland, Lidong Xu, Hong Jiang
  • Patent number: 9832521
    Abstract: Techniques related to encoding image content for transmission and display via a remote device with improved latency and efficiency are discussed. Such techniques may include skipping one or more of frame capture, encode, packetization, and transmission for a frame based on a skip indicator. One or more selective updates may be captured for the skipped frame and integrated into an encode of a subsequent non-skipped frame, which may be packetized and transmitted for to the remote device for presentment to a user.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: November 28, 2017
    Assignee: Intel Corporation
    Inventors: Paul S. Diefenbaugh, Vallabhajosyula S. Somayazulu, Yiting Liao, Krishnan Rajamani, Kristoffer D. Fleming, James M. Holland
  • Patent number: 9612833
    Abstract: Technologies are presented that optimize data processing cost and efficiency. A computing system may comprise at least one processing element; a memory communicatively coupled to the at least one processing element; at least one compressor-decompressor communicatively coupled to the at least one processing element, and communicatively coupled to the memory through a memory interface; and a cache fabric comprising a plurality of distributed cache banks communicatively coupled to each other, to the at least one processing element, and to the at least one compressor-decompressor via a plurality of nodes. In this system, the at least one compressor-decompressor and the cache fabric are configured to manage and track uncompressed data of variable length for data requests by the processing element(s), allowing usage of compressed data in the memory.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: April 4, 2017
    Assignee: Intel Corporation
    Inventors: Altug Koker, Hong Jiang, James M. Holland
  • Patent number: 9497241
    Abstract: Methods and systems may include an apparatus having hardware logic to allocate a set of macroblock bit budgets for a bitstream associated with a video signal. The hardware logic can also control a frame size of the bitstream based on the set of macroblock bit budgets in a single pass encode configuration. In one example, the hardware logic adjusts one or more quantization parameters of the bitstream according to the set of macroblock bit budgets.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: November 15, 2016
    Assignee: Intel Corporation
    Inventors: Ning Lu, Hong Jiang, James M. Holland
  • Patent number: 9438918
    Abstract: Described herein are techniques related to frame-level quantization parameter (QP) adjustment in video encoding. In particular, a method of implementing a bit rate control (BRC) algorithm is described to dynamically control the QP during the video encoding.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: September 6, 2016
    Assignee: Intel Corporation
    Inventors: Ilya V. Brailovskiy, Jason D. Tanner, James M. Holland
  • Publication number: 20160182946
    Abstract: Techniques related to encoding image content for transmission and display via a remote device with improved latency and efficiency are discussed. Such techniques may include skipping one or more of frame capture, encode, packetization, and transmission for a frame based on a skip indicator. One or more selective updates may be captured for the skipped frame and integrated into an encode of a subsequent non-skipped frame, which may be packetized and transmitted for to the remote device for presentment to a user.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: PAUL S. DIEFENBAUGH, VALLABHAJOSYULA S. SOMAYAZULU, YITING LIAO, KRISHNAN RAJAMANI, KRISTOFFER D. FLEMING, JAMES M. HOLLAND
  • Publication number: 20160182915
    Abstract: Techniques related to providing motion estimation for arbitrary pixel block shapes are discussed. Such techniques may include generating a distortion mesh for a pixel block based on multiple calls to a motion estimation such that the distortion mesh includes distortion values associated with regions of the pixel block, a seed motion vector, and candidate motion vectors, and determining a best motion vector for the pixel block based on the distortion mesh.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: SANG-HEE LEE, JAMES M. HOLLAND, LIDONG XU, HONG JIANG
  • Publication number: 20150248292
    Abstract: Technologies are presented that optimize data processing cost and efficiency. A computing system may comprise at least one processing element; a memory communicatively coupled to the at least one processing element; at least one compressor-decompressor communicatively coupled to the at least one processing element, and communicatively coupled to the memory through a memory interface; and a cache fabric comprising a plurality of distributed cache banks communicatively coupled to each other, to the at least one processing element, and to the at least one compressor-decompressor via a plurality of nodes. In this system, the at least one compressor-decompressor and the cache fabric are configured to manage and track uncompressed data of variable length for data requests by the processing element(s), allowing usage of compressed data in the memory.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 3, 2015
    Applicant: Intel Corporation
    Inventors: Altug Koker, Hong Jiang, James M. Holland
  • Publication number: 20150181209
    Abstract: An apparatus may include a memory to receive an image frame to encode; and a modular motion estimation engine to process the image frame. The modular motion estimation engine includes modular motion estimation circuitry comprising a multiplicity of motion estimation circuits, and a motion estimation kernel for execution on the modular motion estimation circuitry to send the image frame through one or more configurable execution pipelines that each execute motion estimation over one or more of the motion estimation circuits.
    Type: Application
    Filed: December 23, 2013
    Publication date: June 25, 2015
    Inventors: JAMES M. HOLLAND, ATTHAR H. MOHAMMED, SRINIVASAN EMBAR RAGHUKRISHNAN