Patents by Inventor James M. Ocker
James M. Ocker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6939501Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: June 26, 2003Date of Patent: September 6, 2005Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Patent number: 6706374Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: November 21, 2002Date of Patent: March 16, 2004Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Patent number: 6703105Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: November 21, 2002Date of Patent: March 9, 2004Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Publication number: 20040000744Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: ApplicationFiled: June 26, 2003Publication date: January 1, 2004Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Patent number: 6635333Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When the marking is formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package structure. The marking may be formed as apertures through or recessed areas in one or more stereolithographically fabricated layers of material. Alternatively, the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. The marking may be formed directly on a surface of a packaged or bare semiconductor device component. As an alternative, the marking can be fabricated separately from a semiconductor device component, then secured thereto. Methods of stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: August 29, 2001Date of Patent: October 21, 2003Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Patent number: 6585927Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: December 14, 2000Date of Patent: July 1, 2003Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Publication number: 20030077418Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: ApplicationFiled: November 21, 2002Publication date: April 24, 2003Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Publication number: 20030072926Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: ApplicationFiled: November 21, 2002Publication date: April 17, 2003Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Patent number: 6489007Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographicaily formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: December 14, 2000Date of Patent: December 3, 2002Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Publication number: 20020018871Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: ApplicationFiled: December 14, 2000Publication date: February 14, 2002Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Publication number: 20020006501Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When the marking is formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package structure. The marking may be formed as apertures through or recessed areas in one or more stereolithographically fabricated layers of material. Alternatively, the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. The marking may be formed directly on a surface of a packaged or bare semiconductor device component. As an alternative, the marking can be fabricated separately from a semiconductor device component, then secured thereto. Methods of stereolithographically marking semiconductor device components are also disclosed.Type: ApplicationFiled: August 29, 2001Publication date: January 17, 2002Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Patent number: 6337122Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When the marking is formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package structure. The marking may be formed as apertures through or recessed areas in one or more stereolithographically fabricated layers of material. Alternatively, the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. The marking may be formed directly on a surface of a packaged or bare semiconductor device component. As an alternative, the marking can be fabricated separately from a semiconductor device component, then secured thereto. Methods of stereolithographically marking semiconductor device components are also disclosed.Type: GrantFiled: January 11, 2000Date of Patent: January 8, 2002Assignee: Micron Technology, Inc.Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger
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Publication number: 20010035597Abstract: A stereolithographically fabricated marking for a semiconductor device component, such as a packaged or unpackaged semiconductor device or another substrate. When formed on a semiconductor device with a stereolithographically formed package structure, the marking may be integral with the package. The marking may be formed as apertures through or recesses in one or more stereolithographically fabricated layers of material, or the marking may include one or more stereolithographically fabricated layers that protrude from a surface of a semiconductor device component. Raised markings may also be formed on the surfaces of packaged or bare semiconductor device components. Alternatively, the marking may be fabricated separately from a semiconductor device component, then secured thereto. Methods for stereolithographically marking semiconductor device components are also disclosed.Type: ApplicationFiled: December 14, 2000Publication date: November 1, 2001Inventors: Ford B. Grigg, James M. Ocker, Rick A. Leininger