Abstract: Dynamic logic units utilize magnetic cores of rectangular hysteresis loop material wound with an input winding, a pair of output windings connected to a CMOS flip-flop, and a d-c control winding. With a d-c current on the control winding, the core experiences flux reversals in response to a square wave on the input winding to generate output pulses which alternately switch the flip-flop to produce a square wave output which matches the input. In a first embodiment, the output windings are in the form of a center-tapped winding with the center tap grounded to provide a low impedance discharge path for the capacitors in grounded R-C filters on the inputs to the flip-flop which suppress voltage spikes. In a second embodiment, output windings on separate magnetic cores which share an input windings but only one of which has a control winding, are connected in opposition to eliminate the switching spikes in the signal applied to the flip-flop.