Abstract: A contaminant trap for a high temperature, vertical furnace of the type used in semiconductor fabrication processing. The trap is designed to reduce particulate deposition within the process chamber, thereby decreasing the likelihood of by-product contamination of the wafers. The trap includes a housing having at least one sidewall, a bottom wall and a top wall which together define an inner compartment. The housing is attached to the exhaust port of the process chamber such that exhaust by-products in the process chamber may not be evacuated through the exhaust port around the housing. The housing has an input opening in the sidewall through which exhaust by-products pass from the process chamber into the inner compartment. An output opening extends through the sidewall near the top wall through which exhaust by-products are subsequently removed from the interior compartment of the housing.