Abstract: The present invention relates to a technique that can be used to reduce the sensitivity of integrated circuits to a failure mechanism to which some integrated circuits (ICs) are susceptible, known as latchup. The present invention relates to a scheme for suppressing latchup sensitivity by a step to be performed after the IC has been manufactured, rather than being a step in the normal production process. The process involves exposing silicon, either in wafer or die form, to energetic ions, such as protons (hydrogen nuclei) or heavier nuclei (e.g. argon, copper, gold, etc.), having energy sufficient to penetrate the silicon from the back of the wafer or die to within a well-defined distance from the surface of the silicon on which the integrated circuit has been formed (the front surface).

Abstract: The present invention relates to a technique that can be used to reduce the sensitivity of integrated circuits to a failure mechanism to which some integrated circuits (ICs) are susceptible, known as latchup. The present invention relates to a scheme for suppressing latchup sensitivity by a step to be performed after the IC has been manufactured, rather than being a step in the normal production process. The process involves exposing silicon, either in wafer or die form, to energetic ions, such as protons (hydrogen nuclei) or heavier nuclei (e.g. argon, copper, gold, etc.), having energy sufficient to penetrate the silicon from the back of the wafer or die to within a well-defined distance from the surface of the silicon on which the integrated circuit has been formed (the front surface).

Abstract: A method for testing IC devices for radiation hardness in a non-destructive manner, comprising subjecting a device under test (DUT) originally in an insensitized state, to a state in which the DUT is more sensitive to adverse effects of ionizing dose radiation and while the DUT is in the more sensitive state, subjecting the DUT to a low level of ionizing radiation to degrade performance of the DUT and electrical testing followed by a restoration of the DUT to its original insensitized state.

Abstract: A structure and method is described for fabricating a nuclear radiation induced damage resistant P-type buried channel charge-coupled device (P-BCD) which converts an optical image focused thereon into a time varying electrical signal. The invention uses a differentially related high level dosing of dopant in the buried channel accompanied by processing at minimum effective temperatures, thereby enhancing device tolerance to exposure to nuclear radiation induced displacement and ionization damage which otherwise would degrade the imaging performance of the device.

Abstract: A radiation-hardened temperature-compensated precision voltage reference includes two diodes connected in series having a prescribed operating current (I.sub.B) flowing therethrough. In one embodiment, a first of the two diodes comprises a reversed-biased avalanche diode (32), and a second of the two diodes comprises a forward biased Schottky diode (30). In another embodiment, a reversed biased avalanche diode (42) is connected in series with a reverse biased tunneling diode (40). Both diodes of either embodiment include opposite and offsetting temperature and neutron coefficients of voltage. A method of adjusting the temperature and neutron coefficients of at least one of the two diodes includes selectively adjusting the current density of one of the diodes by selectively trimming the area of the diode dipole.

Abstract: An electro-mechanical device for converting mechanical energy into electrical energy and vice versa, which advantageously utilizes the phenomenon known as contact charging. A metallic first member is urged into intimate abutting contact along a surface thereof with a surface of a second member formed from semiconductor material. The abutting surfaces of the members are each divided into a plurality of segments such that relative movement between the members, while the members are retained in abutting contact, results in the capacitance of the device varying within predetermined limits. Four preferred embodiments of the device are contemplated. In the first embodiment the area of contact between the abutting surfaces is caused to synchronously vary between predetermined limits. In the second, third, and fourth embodiments the contact area remains constant and, instead, the surface characteristics of the second member are controllably varied to thereby cause the variance in capacitance.