Abstract: Leakage of water from a boiler water system wherein steam is generated in a boiler from feedwater fed to the boiler, and the concentration of impurities in the boiler water within the boiler is reduced by withdrawing fractions thereof as blowdown while admitting additional feedwater as boiler-water makeup, is determined. The boiler has a concentration cycle value, the concentration cycle value being the average value of the concentration of an inert component in the blowdown at steady state (C.sub.F) divided by the concentration of the inert component in the feedwater (C.sub.I). The concentration of the inert component in the boiler at steady state varies from a high concentration C.sub.H, having a value that is higher than C.sub.F, to a low concentration C.sub.L, having a value between the (C.sub.I) and the (C.sub.F), within a time period.

Abstract: A row address generator permits defective dynamic random access memory devices to be addressed by forcing the most-significant bit of the row address to a logical one if the upper half of the defective DRAM is operative and the lower half is inoperative and by forcing the most-significant bit of the row address to a logical zero if the lower half of the DRAM is operative and the upper half is inoperative. A configuration register provides a control signal indicative of the half of the defective DRAM which is operative and a memory access detector provides an access control signal when the defective DRAM device is addressed. A row address control forces the most-significant bit to the proper level responsive to the configuration register and the memory access detector.

Abstract: A keyboard interface is implemented in an integrated circuit and supports first and second types of keyboards and associated interfaces from a single set of integrated circuit terminals. The keyboard interface includes a first keyboard logic responsive to a first mode select signal for providing a first set of control signals for supporting the first type of keyboard and second keyboard logic responsive to a second mode select signal for providing a second set of control signals for supporting the second type of keyboard. A multiplexer couples the first set of control signals to the set of terminals responsive to the first mode select signal and couples the second set of control signals to the set of terminals responsive to the second mode select signal. A keyboard register provides the first or second mode select signals to the first and second keyboard logic and the multiplexer.

Abstract: A memory bank comparator system in a memory system including a plurality of memory banks determines, on a cycle-by-cycle basis, whether a memory address is valid, which one of the memory banks is being addressed, the type of memory bank being addressed, and whether memory bank interleaving is possible. The memory bank comparator system includes a factor assignor which provides a factor for each of the memory banks corresponding to the maximum number of storage locations within each bank, an adder for adding the factors together to provide a sum for each memory bank corresponding to the maximum number of storage locations within its respective memory bank plus the sum of the maximum number of storage locations of the memory banks which precede it, and an address comparator for comparing the memory address to each sum for providing an output indicating which one of the memory banks is being addressed.

Abstract: An apparatus for use with a host computing system for controlling access to a first data bus which is external of the host computing system and which first data bus is operatively connected with a second data bus internal of the host computing system. The apparatus comprises a local processing unit which is configured substantially the same as the host processing unit and is driven by a separate local program distinct from the host processing program driving the host processing unit. The apparatus further comprises a supplemental processing circuit for processing information, which supplemental processing circuit is responsive to the host processing unit and to the local processing unit to determine whether the host processing unit or the local processing unit has operative access to the first data bus. In its preferred embodiment, the first data bus and the second data bus are operatively connected by a configurable buffer circuit for effecting data bus connection.

Abstract: The soluble manganese species can be maintained in aqueous systems in the presence of halogen species by treating the waters with certain water-soluble, nitrogen containing compositions.

Abstract: A human environmental conditioner is provided and consists of a plurality of closed recirculating conduits extending from a turbo pump compressor rotary generator worn on waist of an undergarment that is worn over body of a person. A heat exchanger is formed into the undergarment by interweaving the conduits carry refrigerant fluid to various areas of the body to keep the person cool in summer and warm in winter.