Abstract: A thin-film device system includes a substrate and a plurality of pillars. The plurality of pillars project from a surface of the substrate. Each of the plurality of pillars have a perimeter that includes at least four protrusions that define at least four recessed regions between the at least four protrusions. Each of the at least four recessed regions of each of the plurality of pillars receives one protrusion from an adjacent one of the plurality of pillars. A thin-film device is fabricated over the plurality of pillars.

Abstract: A patterned reflective semiconductor mask uses a multiple layer ARC overlying an absorber stack that overlies a reflective substrate. The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: A modular reactor system comprises a backplane connected to a computer and a thermal control unit. The backplane includes a plurality of seats for releasably holding a plurality of modules. Each module holds a reactor vessel that may be used to conduct experiments. A plurality of laboratory instruments, such as motors, switches, sensors and pumps are included within the backplane and on the reactor modules. These laboratory instruments are utilized to perform work on the contents of the reactor vessels when the modules holding the reactor vessels are positioned in the backplane. A computer is connected to the backplane and controls the laboratory instruments within the backplane and on the reactor modules positioned within the backplane. A thermal control unit provides a thermal control fluid that is delivered to the reactors in the reactor modules when the modules are properly seated in the backplane.

Abstract: A bilayer hardmask 26 is used to manufacture a mask 10, which is can be implemented to pattern a resist 165 on a semiconductor wafer 150. In one embodiment, the bilayer hardmask 26 has two layers: a first hardmask layer 28 and a second hardmask layer 30. The first hardmask layer 28 may be carbon and can be etched selective to the overlying second hardmask layer 30 and an underlying absorber structure 20. In one embodiment, the second hardmask layer 30 is a transparent layer of SiON, SiN, or SiO2. The bilayer hardmask 26 allows for a thinner resist to be used during fabrication of the mask 10.

Abstract: A patterned reflective semiconductor mask (10) uses a multiple layer ARC (24, 26, 28) overlying an absorber stack (22) that overlies a reflective substrate (12, 14). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer (30) is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: A photoresist layer on a semiconductor wafer is patterned using a mask with an absorbing layer that has been repaired by using an additional light-absorbing carbon layer that collects ions that are used in the repair process. After the repair has been completed, the ions that are present in the carbon layer are removed by removing the portion of the carbon layer that is not covered by the absorbing layer. Thus, the absorbing layer, which contains the pattern that is to be exposed on the photoresist layer, also acts as a mask in the removal of the portion of the carbon layer that contains the ions. Thereby the ions that are opaque at the particular wavelength being used are removed from the areas where light is intended to pass through the mask to the photoresist. The buffer layer is made absorbing to avoid problems with reflections at interfaces thereof.

Abstract: An attenuated phase shift mask (10 or 20) includes a substrate (12 or 22) and an attenuation stack (11 or 21) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer (14 or 24) overlying the substrate, a tantalum silicon oxide layer (16 or 26) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer (18 or 28) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer (30) between the substrate (22) and the chromium or ruthenium layer (24). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist (50) on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength.

Abstract: An attenuated phase shift mask (10 or 20) includes a substrate (12 or 22) and an attenuation stack (11 or 21) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer (14 or 24) overlying the substrate, a tantalum silicon oxide layer (16 or 26) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer (18 or 28) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer (30) between the substrate (22) and the chromium or ruthenium layer (24). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist (50) on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength.

Abstract: A patterned reflective semiconductor mask (10) uses a multiple layer ARC (24, 26, 28) overlying an absorber stack (22) that overlies a reflective substrate (12, 14). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer (30) is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: A photoresist layer on a semiconductor wafer is patterned using a mask with an absorbing layer that has been repaired by using an additional light-absorbing carbon layer that collects ions that are used in the repair process. After the repair has been completed, the ions that are present in the carbon layer are removed by removing the portion of the carbon layer that is not covered by the absorbing layer. Thus, the absorbing layer, which contains the pattern that is to be exposed on the photoresist layer, also acts as a mask in the removal of the portion of the carbon layer that contains the ions. Thereby the ions that are opaque at the particular wavelength being used are removed from the areas where light is intended to pass through the mask to the photoresist. The buffer layer is made absorbing to avoid problems with reflections at interfaces thereof.

Abstract: A modular reactor system comprises a backplane connected to a computer and a thermal control unit. The backplane includes a plurality of seats for releasably holding a plurality of modules. Each module holds a reactor vessel that may be used to conduct experiments. A plurality of laboratory instruments, such as motors, switches, sensors and pumps are included within the backplane and on the reactor modules. These laboratory instruments are utilized to perform work on the contents of the reactor vessels when the modules holding the reactor vessels are positioned in the backplane. A computer is connected to the backplane and controls the laboratory instruments within the backplane and on the reactor modules positioned within the backplane. A thermal control unit provides a thermal control fluid that is delivered to the reactors in the reactor modules when the modules are properly seated in the backplane.

Abstract: A modular reactor system comprises a backplane connected to a computer and a thermal control unit. The backplane includes a plurality of seats for releasably holding a plurality of modules. Each module holds a reactor vessel that may be used to conduct experiments. A plurality of laboratory instruments, such as motors, switches, sensors and pumps are included within the backplane and on the reactor modules. These laboratory instruments are utilized to perform work on the contents of the reactor vessels when the modules holding the reactor vessels are positioned in the backplane. A computer is connected to the backplane and controls the laboratory instruments within the backplane and on the reactor modules positioned within the backplane. A thermal control unit provides a thermal control fluid that is delivered to the reactors in the reactor modules when the modules are properly seated in the backplane.

Abstract: A stencil mask (12 or 12′) has both a thin membrane layer (106) and a stress controlled layer (104) for enabling electron and ion projection lithography at very small geometries. The thin membrane layer (106) is within a range of substantially forty to two hundred nanometers and is preferably silicon nitride, and the stress controlled layer is preferably a metal or a metal alloy. Annealing of the stress controlled layer (104) may be performed to obtain a desired stress characteristic. Semiconductors are made using the mask by projecting radiation through the thin membrane stencil mask and reduction optics (30) onto resist (44) formed on a plurality of die, the radiation forming a contrast image on the resist that is subsequently developed. Commercially available lithography equipment is compatible with the thin stencil mask.

Abstract: A desired pattern is formed in a photoresist layer that overlies a semiconductor wafer using a reflective mask. This mask is formed by consecutively depositing a reflective layer, an absorber layer and an anti-reflective (ARC) layer. The ARC layer is patterned according to the desired pattern. The ARC layer is inspected to find areas in which the desired pattern is not achieved. The ARC layer is then repaired to achieve the desired pattern with the absorber layer protecting the reflective layer. The desired pattern is transferred to the absorber layer to reveal the reflective portion of mask. Radiation is reflected off the reflective mask to the semiconductor wafer to expose the photoresist layer overlying the semiconductor wafer with the desired pattern.

Abstract: A desired pattern is formed in a photoresist layer that overlies a semiconductor wafer using a reflective mask. This mask is formed by consecutively depositing a reflective layer, an absorber layer and an anti-reflective (ARC) layer. The ARC layer is patterned according to the desired pattern. The ARC layer is inspected to find areas in which the desired pattern is not achieved. The ARC layer is then repaired to achieve the desired pattern with the absorber layer protecting the reflective layer. The desired pattern is transferred to the absorber layer to reveal the reflective portion of mask. Radiation is reflected off the reflective mask to the semiconductor wafer to expose the photoresist layer overlying the semiconductor wafer with the desired pattern.

Abstract: A stencil mask (12 or 12′) has both a thin membrane layer (106) and a stress controlled layer (104) for enabling electron and ion projection lithography at very small geometries. The thin membrane layer (106) is within a range of substantially forty to two hundred nanometers and is preferably silicon nitride, and the stress controlled layer is preferably a metal or a metal alloy. Annealing of the stress controlled layer (104) may be performed to obtain a desired stress characteristic. Semiconductors are made using the mask by projecting radiation through the thin membrane stencil mask and reduction optics (30) onto resist (44) formed on a plurality of die, the radiation forming a contrast image on the resist that is subsequently developed. Commercially available lithography equipment is compatible with the thin stencil mask.