Abstract: Methods and apparatus are provided for decoding instructions in a computer program wherein the instructions include one or more base instructions that are subject to modification by one or more other instructions. A decoder determines whether a first received instruction was arrived at by a non-incremental change to a program counter (i.e. a jump in the program). If the first instruction was arrived at by a non-incremental change to the program counter the decoder decodes the immediately preceding instruction to determine if the original instruction is a base instruction subject to modification by one or more other instructions. If the preceding instruction indicates that the original instruction is a base instruction an error has occurred and exception handling code is invoked.

Abstract: Methods and apparatus are provided for decoding instructions in a computer program wherein the instructions include one or more base instructions that are subject to modification by one or more other instructions. A decoder determines whether a first received instruction was arrived at by a non-incremental change to a program counter (i.e. a jump in the program). If the first instruction was arrived at by a non-incremental change to the program counter the decoder decodes the immediately preceding instruction to determine if the original instruction is a base instruction subject to modification by one or more other instructions. If the preceding instruction indicates that the original instruction is a base instruction an error has occurred and exception handling code is invoked.

Abstract: Methods and apparatus are provided for decoding instructions in a computer program wherein the instructions include one or more base instructions that are subject to modification by one or more other instructions. A decoder determines whether a first received instruction was arrived at by a non-incremental change to a program counter (i.e. a jump in the program). If the first instruction was arrived at by a non-incremental change to the program counter the decoder decodes the immediately preceding instruction to determine if the original instruction is a base instruction subject to modification by one or more other instructions. If the preceding instruction indicates that the original instruction is a base instruction an error has occurred and exception handling code is invoked.

Abstract: Methods and apparatus are provided for decoding instructions in a computer program wherein the instructions include one or more base instructions that are subject to modification by one or more other instructions. A decoder determines whether a first received instruction was arrived at by a non-incremental change to a program counter (i.e. a jump in the program). If the first instruction was arrived at by a non-incremental change to the program counter the decoder decodes the immediately preceding instruction to determine if the original instruction is a base instruction subject to modification by one or more other instructions. If the preceding instruction indicates that the original instruction is a base instruction an error has occurred and exception handling code is invoked.

Abstract: A binary rotator which includes an array of n cascaded 2-input multiplexer banks and received at an input 2n-bit binary data words can be used not only for rotation but also for selective reversal, without the necessity of the addition of a further multiplex bank dedicated to the reversal. This is achieved by making groups of multiplexers of at least all but one of the n banks of multiplexers separately controllable by words from control logic, rather than feeding the multiplexer banks with single control bits. The control bits are appropriately selected to provide the desired rotation-cum-reversal with just the 2n×n array of multiplexers, and can themselves be generated by appropriate logic gates.

Abstract: A binary rotator which comprises an array of n cascaded 2-input multiplexer banks (104) and receives at an input (102) 2n-bit binary data words can be used not only for rotation but also for selective reversal, without the necessity of the addition of a further multiplexer bank dedicated to the reversal. This is achieved by making groups of multiplexers of at least all but one of the n banks of multiplexers separately controllable by words from control logic (128), rather than feeding the multiplexer banks with single control bits. The control bits are appropriately selected to provide the desired rotation-cum-reversal with just the 2n×n array of multiplexers, and can themselves be generated by appropriate logic gates (124-154).

Abstract: A data processing management system for controlling the execution of multiple threads of processing instructions such as the instructions that are employed to process multimedia data. The management system includes a media control core, a number of data processing units and a multi-banked cache. For the processing instruction for each thread, the multimedia core identifies the data processing operation to be executed as well as the resources needed to execute that operation. The multimedia core then determines for each instruction if all the resources are available to execute the operation. For the operations for which all the resources are available, the multimedia core then determines which operation has the highest priority. The operation having the highest priority is then passed to one of the data processing units for execution. The data and addresses upon which the data processing units act are temporarily stored in the multi-banked cache. Data are written into the cache from multiple input ports.

Abstract: A raster scanned image may be scaled up or down for display on e.g. a portion of a computer display. This is achieved by dividing the image into a plurality of image cells each with a horizontal width less than that of the whole image. A smoothing algorithm is then applied to the lines of each cell in turn to generate new pixel data in dependence on the scaling operation to be performed. The scaling means stores a number of lines of data from a cell the number being dependent on the particular smoothing algorithm being used. To facilitate scanning of the image cell structure additional sync pulses are generated. These are cell horizontal and cell vertical sync pulses.