Abstract: A circuit for providing program assignable I/O addresses in a peripheral unit of a computer in which the initial I/O address is written into a register in the unit. The register receives the address information during the simultaneous presence of a memory write control signal and a particular address which is a duplicate of one which is in the ROM area of the computer's memory.

Abstract: A tone receiver indicates the presence of a PCM tone signal in a bit stream of PCM signal samples. Predetermined characteristics in a consecutive series of PCM signal samples are used to define an interval which begins in response to at least two consecutive ones of the PCM samples being received which are of one polarity and meet a magnitude threshold. The interval ends after at least two more consecutive ones of the PCM samples are received and are of the other polarity and meet a magnitude threshold. The presence of the tone signal is detected when the number of PCM signal samples received during the interval is within a predetermined range and the number of polarity changes in the PCM signal samples is less than a predetermined number. In one arrangement, the tone is indicated as having been received only after it has been detected at least a minimum number of times in a plurality of interval occurrences.