Patents by Inventor James S. Sellars

James S. Sellars has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11989839
    Abstract: A method including executing a logical computing element (LCE) on a server. Worker LCEs are executed on the server. A first electronic file comprising geometry data in a first data structure is received at the controller LCE. An available worker LCE is identified, by the controller LCE, as an in-use worker LCE from among the worker LCEs. The geometry data is imported by the in-use worker LCE. A job instance is established by the in-use worker LCE. A rendering engine is launched by the in-use worker LCE. The rendering engine generates, for the job instance and using the geometry data, a dataset file in a second data structure different than the first data structure. The dataset file is returned by the in-use worker LCE to the controller LCE. The dataset file is returned by the controller LCE to a remote computer.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: May 21, 2024
    Assignee: The Boeing Company
    Inventors: Patrick William O'Neill, Mark Gordon Sellars, Michael Joseph Surface, Nick S. Evans, James J. Salmon
  • Patent number: 6747338
    Abstract: A method of manufacturing MEMS structures and devices that allows the fabrication of dielectric structures with improved etch selectivity and good electrical leakage characteristics. The dielectric structure includes a composite stack of silicon nitride sub-layers with a silicon-rich nitride sub-layer and a stoichiometric silicon nitride sub-layer at opposite ends of the stack. Alternatively, the dielectric structure includes a single silicon nitride layer providing a graded change in silicon content through the dielectric layer, from silicon-rich nitride to stoichiometric silicon nitride.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: June 8, 2004
    Assignee: Analog Devices, Inc.
    Inventors: Thomas K. Nunan, David E. Grosjean, Denis M. O'Kane, James S. Sellars
  • Publication number: 20040099928
    Abstract: A method of manufacturing MEMS structures and devices that allows the fabrication of dielectric structures with improved etch selectivity and good electrical leakage characteristics. The dielectric structure includes a composite stack of silicon nitride sub-layers with a silicon-rich nitride sub-layer and a stoichiometric silicon nitride sub-layer at opposite ends of the stack. Alternatively, the dielectric structure includes a single silicon nitride layer providing a graded change in silicon content through the dielectric layer, from silicon-rich nitride to stoichiometric silicon nitride.
    Type: Application
    Filed: November 27, 2002
    Publication date: May 27, 2004
    Inventors: Thomas K. Nunan, David E. Grosjean, Denis M. O'Kane, James S. Sellars