Patents by Inventor James W. Sundet

James W. Sundet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5206952
    Abstract: A fault tolerant network for a plurality of computers includes a system for controlling access to shared peripherals. Access to the shared peripherals is coordinated among the computers by means of communication through a semaphore box. Each computer connects to the semaphore box via a channel. The semaphore box is comprised of two major sections: a semaphore section and an I/O section. The semaphore section contains two sets of semaphores: a first set comprising reservation semaphores for the shared peripherals; and a second set comprising heartbeat semaphores for the sharing computers. The first set is used to reserve a particular peripheral for a particular computer and indicate the source of the reservation; the second set provides a "heartbeat" to prevent reservation semaphores from being set indefinitely in the event communication with a particular computer is lost.
    Type: Grant
    Filed: September 12, 1990
    Date of Patent: April 27, 1993
    Assignee: Cray Research, Inc.
    Inventors: James W. Sundet, Roger G. Brown
  • Patent number: 4630230
    Abstract: A solid state storage device is disclosed. The storage sections of the device are divided into two groups, with each group including at least one, and as many as four storage sections. A port is provided for delivering words to and receiving words from the sections. A data path between the port and the device is two words wide, with one word received from or delivered to each group. Each section includes a word storage register, with the registers of different sections in the same group being connected in a series fashion to provide a one word data path between the storage sections. Words stored or retrieved from a section are passed through its respective register. In a write operation, words to be stored are transmitted serially from register to register and captured by all sections simultaneously on the same clock cycle. Addressing means within each section then routes the word to the appropriate memory circuit within the section.
    Type: Grant
    Filed: April 25, 1983
    Date of Patent: December 16, 1986
    Assignee: Cray Research, Inc.
    Inventor: James W. Sundet
  • Patent number: D342485
    Type: Grant
    Filed: August 6, 1991
    Date of Patent: December 21, 1993
    Assignee: Cray Research, Inc.
    Inventors: Steven J. Dean, Robert A. Moe, James W. Sundet, Amy Bower, James W. Luther, Eric J. Mueller, Eugene N. Reshanov