Abstract: A sensor for a flexible sensor assembly includes a drive coil, a first set of sensing coils, a second set of sensing coils, and a configuration for sensing for discontinuities in a structure desired to be sensed. A method of operating the sensor can include positioning the sensor proximate to the structure, energizing the drive coil, and sensing eddy currents with the sensing coils.

Abstract: An ultrasound transducer array architecture and manufacturing method is provided. The method includes providing an ultrasonic transducer including a plurality of modules, each module including an ultrasonic transducer array and an application specific integrated circuit (ASIC), the ultrasonic transducer array and the ASIC electrically coupled to a flexible interconnect, the flexible interconnect coupled to a connector. The ASIC and flexible interconnect may be arranged such that each ultrasonic transducer array is directly adjacent to another ultrasonic transducer array. The ASIC may be electrically coupled to the flexible interconnect and the ASIC to the transducer array via a redistribution layer. Each of the plurality of modules may be a stack with the ultrasonic transducer array on the RDL and RDL on the ASIC, wherein the flexible interconnect extends laterally from a top surface of the ASIC and curves down to a bottom surface of the ASIC.

Abstract: This disclosure generally relates to systems and methods for improving adhesive bonding between a layer of a device that transmits optical signals, such as a photonics integrated circuit, and a waveguide that helps to transmit at least some of the optical signals. Adhesion methods may include using vapor-phase encapsulation, capillary underfill, or compressive displacement to secure the waveguide to at least one layer of the device that transmits optical signals. In each of these methods, the adhesion method may create an adhesive interface between at least a portion of the waveguide and a contacting layer of the device that transmits optical signals.

Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

Abstract: An electronics package includes an interconnect assembly comprising a first insulating substrate, a first wiring layer formed on a lower surface of the first insulating substrate, and at least one through hole extending through the first insulating substrate and the first wiring layer. The electronics package also includes an electrical component assembly comprising an electrical component having an active surface coupled to an upper surface of the first insulating substrate opposite the lower surface. The active surface of the electrical comprises at least one metallic contact pad. At least one conductive stud is coupled to the at least one metallic contact pad and is positioned within the at least one through hole. A conductive plug contacts the first wiring layer and extends into the at least one through hole to at least partially surround the at least one conductive stud.

Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.

Abstract: A silicon photomultiplier array includes a plurality of microcells within the photomultiplier array and located on the silicon wafer, the plurality of microcells arranged in rows and columns, each of the plurality of microcells including an output port, and configured to provide a pulse waveform having pulse characteristics, at least one repatterning dielectric layer in contact with a silicon wafer layer back surface, the silicon wafer having an active surface opposed to the back surface, and a plurality of respective through-silicon-vias (TSVs) coupling the output port of respective ones of the plurality of microcells on the active surface of the silicon wafer to a plurality of respective circuit traces on the at least one repatterning dielectric layer disposed on the back surface of the silicon wafer. A method for producing the silicon photomultiplier array is also disclosed.

Abstract: A photon detector having an optical transparent plate and photodiode array interconnected by an optical light guide array. The optical light guide array including elements providing a transmission line between the optical transparent plate and the photodiode array, where the position of one or more optical light guide elements is formed to adjust for a miss-registered photodiode individual element.

Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced.

Abstract: The present disclosure relates to the fabrication of electrical components and, in particular to the use of a reconfigurable substrate to which a flexible circuit may be affixed. In certain embodiments, the reconfigurable substrate may be moved between different configurations, certain of which are suitable for fabrication and certain of which are suitable for operation.

Abstract: A photon detector having an optical transparent plate and photodiode array interconnected by an optical light guide array. The optical light guide array including elements providing a transmission line between the optical transparent plate and the photodiode array, where the position of one or more optical light guide elements is formed to adjust for a miss-registered photodiode individual element.

Abstract: The present disclosure relates to the fabrication of electrical components and, in particular to the use of a reconfigurable substrate to which a flexible circuit may be affixed. In certain embodiments, the reconfigurable substrate may be moved between different configurations, certain of which are suitable for fabrication and certain of which are suitable for operation.

Abstract: Embodiments of a photodiode array are provided herein. In some embodiments, a photodiode array may include a semiconductor layer configured to convert photons into analog electrical signals; and a passive layer having a first surface and a second surface disposed opposite the first surface, wherein the semiconductor layer is coupled to the first surface, and wherein the passive layer is configured to have a signal receiving component coupled directly to the second surface of the passive layer.

Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.

Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced.

Abstract: A circuit board includes a solder wettable surface and a metal mask configured to restrict solder from flowing outside the solder wettable surface of the circuit board.

Abstract: A flexible wire assembly includes a plurality of elongated conductors and insulators each having a quadrilateral cross section and alternatingly laminated together, the flexible wire assembly having a wire width measured across the conductor and insulators, a wire height equivalent to the height of the conductors and insulators, and a wire length which is measured in a longitudinal direction orthogonal to the wire width and the wire height, wherein the wire length is one or more orders of magnitude greater than the wire width and the wire height; and a first device comprising a plurality of bond pads spaced to define a bond pad pitch, wherein the flexible wire assembly is coupled to the first device at the bond pads such that spacing of the conductor conductors is matched to the bond pad pitch.

Abstract: A method for forming a sensor stack is presented. The method includes providing a substrate having a first side and a second side. Furthermore, the method includes disposing an integrated circuit having a first side and a second side on the first side of the substrate, where the integrated circuit comprises a first plurality of contact pads disposed on the first side of the integrated circuit. The method also includes providing a sensor array having a plurality of sensor elements, wherein each of the sensor elements has a first side and a second side, and wherein the sensor array comprises a second plurality of contact pads disposed on the second side of the sensor array.

Abstract: An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package may provide a plurality of interfaces for interconnecting to an integrated circuit in the package a plurality of signals from the sensor array and having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.