Patents by Inventor Jamie Riotto

Jamie Riotto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6801547
    Abstract: A technique to identify a response cell in a ranging grant procedure is disclosed herein. The format of the response cell reduces the probability of erroneous response cell detection. The response cell is a conventional ATM cell whose payload includes multiple cell delineation bytes (CDBs).
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: October 5, 2004
    Assignee: Terawave Communications, Inc.
    Inventors: Edward W. Boyd, Ross G. Werner, Wai Y. Kan, Robert J Deri, Jamie Riotto, Barry A. Perkins
  • Patent number: 6683876
    Abstract: A novel packet switched routing architecture for establishing multiple, concurrent communications between a plurality of devices. Any number of devices are coupled to a central packet switched router via links. Due to the nature of these tightly coupled links, high data rates can be achieved between devices and the packet switched router with minimal pins. Any device can communicate to any other device via the packet switched router. The packet switched router has the capability of establishing multiple communication paths at the same time. Hence, multiple communications can occur simultaneously, thereby significantly increasing the overall system bandwidth.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: January 27, 2004
    Assignee: Silicon Graphics, Inc.
    Inventors: James E. Tornes, Steven C. Miller, Daniel Yau, Jamie Riotto
  • Patent number: 5784569
    Abstract: The present invention discloses a novel arbitration procedure for selecting among devices in a computer system requesting access to a single resource such as, for example, a system bus or main memory. The arbitration procedure provides an efficient means for guaranteeing the available system bus bandwidth to devices having high bandwidth requirements. Each device can be allotted a certain amount of bandwidth that is guaranteed to be available for that device within a given time interval. Excess bandwidth not consumed by the guaranteed allotments can be used as remainder (e.g., available but not guaranteed) bandwidth by the devices. The arbitration procedure further provides a guaranteed maximum latency so that no device is prevented from completing data transfers in a timely manner. The arbitration procedure still further provides the ability to dynamically program the amount of the bandwidth that is guaranteed a particular device.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: July 21, 1998
    Assignee: Silicon Graphics, Inc.
    Inventors: Steven C. Miller, Jamie Riotto, James E. Tornes, Ross G. Werner