Abstract: Systems and methods for calibrating VNA modules which dynamically assigns match utilization to improve overall calibration accuracy and reduce problems from a non-optimal set of calibration components and simplify user input requirements during calibration.

Abstract: A method for marking relevant data within an acquired set of data in accordance with an embodiment includes receiving a location of a first synchronization event within a synchronizing time pulse synchronized with the acquired set of data, searching the synchronizing time pulse within a predetermined window for the first synchronization event based on the location, identifying the first synchronization event based on the search, and obtaining data from the acquired set of data within an offset range determined based on the identified first synchronization event. The steps are then iteratively repeated for a number of periods.

Abstract: A system for obtaining measurements for a device under test (DUT) includes a vector network analyzer including a storage medium and a controller for controlling a sweep and a trigger driver configured to provide a synchronization signal to the DUT and the controller to synchronize internal signal components of the vector network analyzer including signal sources, local oscillators (LOs) and an analog-to-digital converter (ADC) clock. A signal is received by the vector network analyzer in response to a test signal generated and transmitted to the DUT. Data related to the received signal is acquired and stored in at the storage medium. The controller inserts a mark into the time record based on an event of the sweep for identifying data from the received signal associated with the event within the time record.

Abstract: In an embodiment, a system for measuring high frequency response of a DUT having improved power leveling includes a signal source, a modulator, an upconverter, and a leveling loop having dynamic gain adjustment. The signal source generates a test signal and the modulator modulates the amplitude of the generated test signal to target a requested power. The converter multiplies a frequency of the test signal. The leveling loop is configured to detect an intermediate frequency (IF) signal generated in response to the upconverted test signal. Modulation of the amplitude of the generated test signal by the modulator is adjustable based on the IF signal detected by the leveling loop.

Abstract: Methods, systems and computer program products for efficiently characterizing devices under test (DUTs) using a vector network analyzer (VNA) are provided. A N-port DUT can be divided as appropriate into multiple sub-devices, or multiple separate devices can be present. A parent calibration is performed. The VNA is then used to determine the S-parameters of interest for each sub-device or separate device, preferably without measuring S-parameters that are not of interest. This can include measuring S-parameters and removing corresponding error coefficients determined during the parent calibration.

Abstract: Methods, systems and computer program products for efficiently characterizing devices under test (DUTs) using a vector network analyzer (VNA) are provided. A N-port DUT can be divided as appropriate into multiple sub-devices, or multiple separate devices can be present. A parent calibration is performed. The VNA is then used to determine the S-parameters of interest for each sub-device or separate device, preferably without measuring S-parameters that are not of interest. This can include measuring S-parameters and removing corresponding error coefficients determined during the parent calibration.