Patents by Inventor Jan B. F. W. Ruijs

Jan B. F. W. Ruijs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4972106
    Abstract: A binary-to-ternary converter arrangement which achieves protective resistance against high outside voltages without having to compromise the voltage level of the positive and negative output ternary pulses. In so achieving, the minimum amplitude requirement of a CCITT recommendation of an output pulse for a given supply voltage is satisfied. This converter arrangement includes a parallel circuit of first and second series circuits. The first series circuit forms a main current path of two transistors and the second series circuit forms a current path of a diode, two resistors, and a third transistor. The different elements of these two circuits, along with a capacitor element, are interconnected in such a way as to eliminate the need for the use of a transformer altogether. The control electrodes of the first and second transistors serve as input ports and the junction port of the two resistors serves as the output port.
    Type: Grant
    Filed: March 17, 1989
    Date of Patent: November 20, 1990
    Assignee: AT&T Bell Laboratories
    Inventor: Jan B. F. W. Ruijs
  • Patent number: 4920322
    Abstract: A voltage controlled oscillator (VCO) comprises the series arrangement of two signal inverters whose outputs are coupled to the input of the first signal inverter through a feedback loop, and a control circuit including a series arrangement of two diodes arranged in the same direction, whose interconnected electrodes are coupled to the input of the first inverter. The other electrodes of the diodes form inputs for two control voltages with which the frequency of the VCO can be varied over a continuous range. The VCO is used in a phase locked loop which includes a phase detector for generating an error signal representative of a phase difference between a reference signal and a signal taken from the VCO, and a loop filter for producing a control signal from the error signal. The phase detector is arranged as an EXOR gate with a first input for the reference signal voltage and a second input for the output voltage of the VCO.
    Type: Grant
    Filed: February 23, 1989
    Date of Patent: April 24, 1990
    Assignee: AT&T Philips Telecommunications
    Inventor: Jan B. F. W. Ruijs