Abstract: There is disclosed a controller configured to control a synchronous rectification MOSFET having a drain, a source and a gate; the controller comprising a regulator configured to regulate a voltage between the drain and the source to a first regulation voltage, and a gate charger operable during a turn-on phase of the synchronous rectification MOSFET operation and configured to regulate a voltage between the drain and the source to a second regulation voltage having a larger absolute value than the absolute value of the first regulation voltage, wherein the gate charger is further configured to, when in operation, disable the regulator. Also disclosed is a switched mode power converter comprising such a synchronous rectification MOSFET, and a method for controlling such a synchronous rectification MOSFET.

Abstract: A controller for a switched mode power supply, wherein the controller is configured to be connected to a synchronous rectifier.

Abstract: Disclosed is a method to control the synchronous rectification in a power converter including a primary winding and a secondary winding, including detecting a peak current in a secondary winding, determining a blanking threshold based on the peak current, and blanking a turning off of a synchronous rectifier (SR) switch for a blanking time based on the blanking threshold.

Abstract: Disclosed is a method to control the synchronous rectification in a power converter including a primary winding and a secondary winding, including detecting a peak current in a secondary winding, determining a blanking threshold based on the peak current, and blanking a turning off of a synchronous rectifier (SR) switch for a blanking time based on the blanking threshold.

Abstract: There is disclosed a controller configured to control a synchronous rectification MOSFET having a drain, a source and a gate; the controller comprising a regulator configured to regulate a voltage between the drain and the source to a first regulation voltage, and a gate charger operable during a turn-on phase of the synchronous rectification MOSFET operation and configured to regulate a voltage between the drain and the source to a second regulation voltage having a larger absolute value than the absolute value of the first regulation voltage, wherein the gate charger is further configured to, when in operation, disable the regulator. Also disclosed is a switched mode power converter comprising such a synchronous rectification MOSFET, and a method for controlling such a synchronous rectification MOSFET.

Abstract: A controller for a switched mode power supply, wherein the controller is configured to be connected to a synchronous rectifier.

Abstract: The invention relates to a switched mode power converter and a method of operating such a converter A switched mode power converter according to the invention includes a transformer (2) having a primary winding (2a) and at least one secondary winding (2b) and a secondary side rectifier circuit including an output filter (6, 10) coupled to the at least one secondary winding (2b), and a secondary side active switch device (S3) coupled between the at least one secondary winding and the output filter. The converter further includes primary side and secondary side control means (12, 16, 18) for regulating the switching of the primary side and secondary side switches, respectively, and configured so as to reduce the duty cycle of the primary side switch device (S1) during a lower power mode of operation of the converter, the reduction of the duty cycle of the primary side switch being determined with reference to the duty cycle of the secondary side switch (S3).

Abstract: A bi-directional switch for a power converter comprises first and second transistors (SW1, SW2) and a floating supply capacitor (C2) associated with the second transistor (SW2). The drive circuit and/or gate of the first transistor (SW1) is charged by the floating supply capacitor (C2) of the second transistor (SW2). The charging takes place at a predetermined moment in the switching cycle, and in particular at a moment in the switching cycle when the voltage across the bi-directional switch is substantially a minimum.

Abstract: A switched mode power converter is provided which includes a transformer (2) having a primary winding (2a) and at least one secondary winding (2b); a primary side active switch device (S1) coupled to the primary winding for selectively applying an input voltage to the primary winding; and a secondary side rectifier circuit including an output filter (6, 12) coupled to the at least one secondary winding (2), and first and second active switch devices (16, 14) coupled between the at least one secondary winding (2b) and the output filter. The switch devices are arranged such that each one is operable independently of the other to block current between the at least one secondary winding and the output filter in an opposite direction to the other. This facilitates better regulation of the converter and avoids the occurrence of voltage spikes encountered in existing configurations.

Abstract: A switched mode power converter is provided which includes a transformer (2) having a primary winding (2a) and at least one secondary winding (2b); a primary side active switch device (S1) coupled to the primary winding for selectively applying an input voltage to the primary winding; and a secondary side rectifier circuit including an output filter (6, 12) coupled to the at least one secondary winding (2), and first and second active switch devices (16, 14) coupled between the at least one secondary winding (2b) and the output filter. The switch devices are arranged such that each one is operable independently of the other to block current between the at least one secondary winding and the output filter in an opposite direction to the other. This facilitates better regulation of the converter and avoids the occurrence of voltage spikes encountered in existing configurations.

Abstract: The invention relates to a switched mode power converter and a method of operating such a converter A switched mode power converter according to the invention includes a transformer (2) having a primary winding (2a) and at least one secondary winding (2b) and a secondary side rectifier circuit including an output filter (6, 10) coupled to the at least one secondary winding (2b), and a secondary side active switch device (S3) coupled between the at least one secondary winding and the output filter. The converter further includes primary side and secondary side control means (12, 16, 18) for regulating the switching of the primary side and secondary side switches, respectively, and configured so as to reduce the duty cycle of the primary side switch device (S1) during a lower power mode of operation of the converter, the reduction of the duty cycle of the primary side switch being determined with reference to the duty cycle of the secondary side switch (S3).

Abstract: A dc-to-dc converter has two field effect transistors connected in series between an input terminal and a ground terminal. Adjustment of the dead time when both transistors are off is carried out by providing Kelvin feedback connections directly across the drain and source of one or both of the transistors, so bypassing signal line resistance and inductances.

Abstract: A bi-directional switch for a power converter comprises first and second transistors (SW1, SW2) and a floating supply capacitor (C2) associated with the second transistor (SW2). The drive circuit and/or gate of the first transistor (SW1) is charged by the floating supply capacitor (C2) of the second transistor (SW2). The charging takes place at a predetermined moment in the switching cycle, and in particular at a moment in the switching cycle when the voltage across the bi-directional switch is substantially a minimum.

Abstract: A semiconductor switch comprises two NMOS transistors coupled in an anti-series arrangement, and a gate control circuit coupled to both gates of the NMOS transistors. Both drains of the NMOS transistors are interconnected, and the gate control circuit is coupled to the drains interconnection. The required chip area is halved compared to prior art switches. Pumping the gates to higher voltages may cause a further reduction of the sizes of the NMOS transistors. In addition, advantageously, a large range of input and output voltages can be allowed between the sources of the NMOS transistors, whereby the sources act as input and output respectively of the switch, thus allowing application of the switch in a broad technical field.

Abstract: A power management system (100) comprising a power generator (1) for providing a supply signal (Vchg) to a load (2), a floating controllable bi-directional current sensor (N1) coupled via a first connection (10) to the power generator and via a second connection (20) to the load (2) for detecting a positive current (pos) flowing from the power generator (1) to the load (2) and a negative current (neg) from the load (2) to the power generator (3).

Abstract: A dc-to-dc converter has two field effect transistors (35, 36) connected in series between an input terminal (37) and a ground terminal (38). Adjustment of the dead time when both transistors (35, 36) are off is carried out by providing Kelvin feedback connections (71, 72, 67, 68) directly across the drain (39, 44) and source (43, 40) of one or both of the transistors (35, 36), so bypassing signal line resistance and inductances.

Abstract: A semiconductor switch comprises two NMOS transistors coupled in an anti-series arrangement, and a gate control circuit coupled to both gates of the NMOS transistors. Both drains of the NMOS transistors are interconnected, and the gate control circuit is coupled to the drains interconnection. The required chip area is halved compared to prior art switches. Pumping the gates to higher voltages may cause a further reduction of the sizes of the NMOS transistors. In addition advantageously a large range of input and output voltages can be allowed between the sources of the NMOS transistors, whereby the sources act as input and output respectively of the switch, thus allowing application of the switch in a broad technical field.

Abstract: A power switch comprising a field effect transistor (FET) including an active area in a semiconductor body, a channel formed in said active area and having a periodic structure, source diffusion zones and drain diffusion zones in the active area, a source diffusion zone being separated from a drain diffusion zone by a half period of the periodic structure of the channel, and each source diffusion zone having a source contact, and each drain diffusion zone having a drain contact. The source contacts and the drain contacts are aligned in a row in a direction transverse to the plane of symmetry of the channel. Current paths have substantially the same series resistance between a source contact and a drain contact associated with a source diffusion zone and a drain diffusion zone which alternate with each other. The ESD-robust power switch is very compact and suited for high voltages.

Abstract: A device for creating a localized water jet within a body of water allows for the displacement of material from the floor of the body of water. The device includes two powered screws within a jet pipe. The screws are arranged coaxially and their direction of rotation, pitch, and speed of rotation are arranged such that the torque produced by one of the screws tends to counteract the torque produced by the other, allowing for improved control of the device.

Abstract: An integrated circuit which includes a converter for converting a logic input signal of a first logic type into a logic output signal of a second logic type, for example, from ECL to CMOS level. The converter comprises a buffer, including a controllable load and a driver transistor, and a control circuit. The load is controlled as a function of a control voltage and a reference voltage which are externally applied so that the output signal is substantially equal to the reference voltage if the input signal is substantially equal to the control voltage. In one embodiment the control circuit is a copy of the buffer and receives the control voltage at its input. Its load is controlled by a differential amplifier whose inputs receive the reference voltage and the output voltage of the control circuit. A CMOS-SRAM comprising ECL/CMOS level converters of the above kind communicates with fast ECL circuits and has a low energy consumption.