Patents by Inventor Jan Doutreloigne

Jan Doutreloigne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9082915
    Abstract: Described herein is a low-voltage unidirectional bypass element connected across a solar cell and operable to allow current to flow when the operation of the solar cell is suspended. The bypass element includes a single field effect transistor connected between first and second terminals as a switch, and a detection circuit for detecting suspension of the solar cell's operation and activating the switch to bypass the solar cell in the event of its operation suspension. Diodes are connected in parallel with the normally-open switch and receive current, when the solar cell's operation is suspended, to trigger operation of the detection circuit. The detection circuit includes a charge pump, a timer circuit, a control generation unit and a switch control circuit. The switch control circuit generates a control signal to close the switch and to allow current to bypass the solar cell.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: July 14, 2015
    Assignees: IMEC, Universiteit Gent
    Inventors: Jan Doutreloigne, Pieter Bauwens
  • Publication number: 20110075446
    Abstract: The present disclosure presents a circuit for converting a pulsed input voltage to a DC output voltage. The circuit comprises input nodes for receiving the pulsed input voltage and output nodes for outputting the DC output voltage. The circuit further comprises a first transistor and a second transistor connected between the input and the output nodes in a synchronous rectifier configuration. The first and second transistors each have a gate connected to a driving circuit configured for alternately charging the gates of the transistors whereby the driving circuit comprises an auxiliary circuit not directly connected to the input nodes and configured for providing a predetermined auxiliary supply voltage to the gates. In an embodiment, the auxiliary circuit comprises a buck DC-DC converter of which an input node is connected to the output nodes and of which an output node is connected to the gates.
    Type: Application
    Filed: September 30, 2010
    Publication date: March 31, 2011
    Applicants: IMEC, UNIVERSITEIT GENT
    Inventors: Jan Doutreloigne, Benoit Bakeroot, Stefaan Maeyaert, Vincent De Gezelle
  • Patent number: 6917236
    Abstract: A level-shifter architecture with high-voltage driving capability and extremely low power consumption, exploiting dynamic control of the charge on the gate electrodes of the high-voltage output transistors, is provided. The architecture can be integrated in CMOS technology and can be applied to various applications, including monolithic integration of high-voltage display driver circuits in battery-powered applications.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: July 12, 2005
    Assignees: Interuniversitair Micro-Elektronica Centrum (IMEC vzw), Universitait Gent, Asulab S.A.
    Inventors: Jan Doutreloigne, Joachim Grupp, Rolf Klappert
  • Publication number: 20040169543
    Abstract: A level-shifter architecture with high-voltage driving capability and extremely low power consumption, exploiting dynamic control of the charge on the gate electrodes of the high-voltage output transistors, is provided. The architecture can be integrated in CMOS technology and can be applied to various applications, including monolithic integration of high-voltage display driver circuits in battery-powered applications.
    Type: Application
    Filed: March 10, 2004
    Publication date: September 2, 2004
    Inventors: Jan Doutreloigne, Joachim Grupp, Rolf Klappert
  • Patent number: 6731151
    Abstract: A level-shifter architecture with high-voltage driving capability and extremely low power consumption, exploiting dynamic control of the charge on the gate electrodes of the high-voltage output transistors, is provided. The architecture can be integrated in CMOS technology and can be applied to various applications, including monolithic integration of high-voltage display driver circuits in battery-powered applications.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: May 4, 2004
    Assignees: Interuniversitar Micro-Elektronica Centrum (IMEC vzw), Universiteit Gent, Asulab S.A.
    Inventor: Jan Doutreloigne
  • Patent number: 6531852
    Abstract: The present invention is related to a high voltage generating device comprising a high voltage generating component having as input a voltage signal constructed at least by comparing a reference current and a feedback current, said feedback current being related to the output voltage generated by said high voltage generating component.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: March 11, 2003
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventor: Jan Doutreloigne
  • Publication number: 20020105289
    Abstract: The present invention is related to a high voltage generating device comprising a high voltage generating component having as input a voltage signal constructed at least by comparing a reference current and a feedback current, said feedback current being related to the output voltage generated by said high voltage generating component.
    Type: Application
    Filed: September 21, 2001
    Publication date: August 8, 2002
    Inventor: Jan Doutreloigne