Abstract: A quantum circuit includes a state preparation circuit, that prepares an n choose k state on n qubits, an oracle, and a microdiffuser circuit. Wherein, for each in a sequence of iterations, the oracle and the microdiffuser circuit are applied, wherein the microdiffuser circuit operates on a subset of n qubits of varying size over the sequence of iterations, wherein for the jth iteration of the sequence of iterations, the microdiffuser circuit operates on a subset of n qubits of size mj, and wherein a measurement is applied to the n qubits.

Abstract: A TDGn quantum circuit on n wires includes a first set of circuits and a plurality of CX gates appended to the first set of circuits to generate a plurality of additional circuits, wherein each of the additional circuits is formed by appending a CX gate of the plurality of CX gates in a corresponding one of a plurality of configurations to one circuit of a first set of circuits. The TDGn quantum circuit further includes a second set of circuits, wherein the second set of circuits is generated by an iterative selection procedure.

Abstract: A controlled quantum logic gate implements a n?1 qubit controlled Z gate function based on n qubits and an ancilla qubit, wherein n is greater than 3. The quantum logic gate includes a plurality of leading gates that operate on the at least one ancilla qubit to generate an ancilla qubit state in response to an initial state of the ancilla bit and each of the n qubits. A measurement operates on the ancilla qubit state to generate a classical ancilla bit state. At least one following gate includes at least one controlled Z gate equivalent that operates under control of at least one of the n qubits and further under control of the classical ancilla bit state to selectively apply a phase adjustment to at least another one of the n qubits.

Abstract: A controlled quantum logic gate implements a n?1 qubit controlled Z gate function based on n qubits and an ancilla qubit, wherein n is greater than 3. The quantum logic gate includes a plurality of leading gates that operate on the at least one ancilla qubit to generate an ancilla qubit state in response to an initial state of the ancilla bit and each of the n qubits. A measurement operates on the ancilla qubit state to generate a classical ancilla bit state. At least one following gate includes at least one controlled Z gate equivalent that operates under control of at least one of the n qubits and further under control of the classical ancilla bit state to selectively apply a phase adjustment to at least another one of the n qubits.