Abstract: A frequent problem that arises in particular with regard to the analysis of memory components is that the memory components have to be tested under realistic conditions in a real application environment. In practice, such components are normally firmly soldered in on a module carrier. Owing to the thermal load during soldering, this solution cannot always be used and, furthermore, the contacts that are made should be detachable. Commercially available contact bases with detachable contacts cannot be used, however, since their dimensions are too large and they do not fit in the available surface area on the module carrier. The novel contact base is sufficiently small that a plurality of contact bases can be arranged closely one next to the other in a row in a very small space on a module carrier. The module carrier has plug contacts to be plugged into a commercial socket in order to make contact.

Abstract: A frequent problem that arises in particular with regard to the analysis of memory components is that the memory components have to be tested under realistic conditions in a real application environment. In practice, such components are normally firmly soldered in on a module carrier. Owing to the thermal load during soldering, this solution cannot always be used and, furthermore, the contacts that are made should be detachable. Commercially available contact bases with detachable contacts cannot be used, however, since their dimensions are too large and they do not fit in the available surface area on the module carrier. The novel contact base is sufficiently small that a plurality of contact bases can be arranged closely one next to the other in a row in a very small space on a module carrier. The module carrier has plug contacts to be plugged into a commercial socket in order to make contact.

Abstract: An insulated gate field effect transistor is disclosed. The transistor includes a semi-insulating silicon carbide substrate, an epitaxial layer of silicon carbide layer adjacent the semi-insulating substrate for providing a drift region having a first conductivity type, and source and drain regions in the epitaxial layer having the same conductivity type as the drift region. A channel region is in the epitaxial layer, has portions between the source and the drain regions, and has the opposite conductivity type from the source and drain regions. The transistor includes contacts to the epitaxial layer for the source, drain and channel regions, an insulating layer over the channel region of the epitaxial layer, and a gate contact adjacent the insulating layer and the channel region.