Patents by Inventor Jang Hong Choi
Jang Hong Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11935701Abstract: A capacitor component includes a body including dielectric layers, first and second internal electrodes, laminated in a first direction, facing each other, and first and second cover portions, disposed on outermost portions of the first and second internal electrodes, and first and second external electrodes, respectively disposed on both external surfaces of the body in a second direction, perpendicular to the first direction, and respectively connected to the first and second internal electrodes. An indentation including a glass is disposed at at least one of boundaries between the first internal electrodes and the first external electrode or one of boundaries between the second internal electrodes and the second external electrode.Type: GrantFiled: April 4, 2023Date of Patent: March 19, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jang Yeol Lee, Ji Hong Jo, Yoo Jeong Lee, Myung Jun Park, Jong Ho Lee, Hye Young Choi, Jae Hyun Lee, Hyun Hee Gu
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Patent number: 11837996Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.Type: GrantFiled: January 26, 2022Date of Patent: December 5, 2023Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jang Hong Choi, Bon Tae Koo, Kyung Hwan Park, Min Park, Seon-Ho Han
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Patent number: 11799424Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.Type: GrantFiled: January 26, 2022Date of Patent: October 24, 2023Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jang Hong Choi, Bon Tae Koo, Kyung Hwan Park, Min Park, Seon-Ho Han
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Publication number: 20220302909Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.Type: ApplicationFiled: January 26, 2022Publication date: September 22, 2022Inventors: Jang Hong CHOI, Bon Tae KOO, Kyung Hwan PARK, Min PARK, Seon-Ho HAN
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Publication number: 20220244371Abstract: Disclosed is a radar device capable of operating in a dual mode, which includes a transmitter that includes a first signal generator that generates a Doppler radar signal and a second signal generator that generates a Frequency Modulated Continuous Wave (FMCW) radar signal, a receiver that receives a reflected signal reflected from a target and converts the reflected signal to a digital signal, a signal processing circuit that processes the digital signal differently depending on the dual mode to output an output signal, a signal analysis circuit that analyzes the output signal, and a controller that controls operations of the transmitter, the receiver, the signal processing circuit, and the signal analysis circuit, and the dual mode includes a first mode in which the first signal generator is activated and a second mode in which the second signal generator is activated.Type: ApplicationFiled: January 11, 2022Publication date: August 4, 2022Inventors: Min PARK, Bon Tae KOO, Kyung Hwan PARK, PIL JAE PARK, Jang Hong CHOI
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Publication number: 20210359654Abstract: Provided is a drive amplifier. A drive amplifier may include: a main circuit configured to receive an RF input signal and output a first RF output signal; and a selective bias adjustment circuit comprising a first common gate transistor to which a first common gate bias voltage is applied and a second common gate transistor to which a second common gate bias voltage is applied, and configured to output a second RF output signal using the first common gate transistor and the second common gate transistor.Type: ApplicationFiled: May 11, 2021Publication date: November 18, 2021Inventors: Min PARK, Jang Hong CHOI, Bon Tae KOO, Kisu KIM, Kyung Hwan PARK
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Publication number: 20210181300Abstract: Disclosed is a radar. The radar comprises a transmitter configured to radiate an output signal to an outside. The transmitter includes the phase shifter including a first oscillator configured to generate a first signal, based on a first external signal and a second oscillator configured to generate a second signal, based on a second external signal having a phase different from that of the first external signal, and wherein the first oscillator further receives the second signal to generate the first signal and the second oscillator further receives the first signal to generate the second signal, and configured to generate an oscillation signal of which phase is shifted based on the first signal and the second signal, and the signal amplifier configured to amplify the phase-shifted oscillation signal to generate the output signal.Type: ApplicationFiled: November 23, 2020Publication date: June 17, 2021Applicant: Electronics and Telecommunications Research InstituteInventors: Jang Hong CHOI, Bon Tae KOO
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Patent number: 10044385Abstract: Provided is a transmitter. The transmitter includes a signal combiner configured to amplify a first differential radio frequency (RF) signal modulated to be transmitted through a first frequency band and a second differential RF signal modulated to be transmitted through a second frequency band non-adjacent to the first frequency band and summate the amplified first differential RF signal and the amplified second differential RF signal in a current mode to generate an RF signal and a power amplifier configured to amplify the generated RF signal.Type: GrantFiled: March 18, 2016Date of Patent: August 7, 2018Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong Woo Kang, Cheon Soo Kim, Jang Hong Choi
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Patent number: 9780891Abstract: A method and device for calibrating a DC offset and an I-Q imbalance component of an RF transceiver, the method including inputting a test signal into a transmitter, and converting the test signal into an analogue test signal; converting the analogue test signal using a transmitting mixer; sub-sampling a signal output from the transmitting mixer; and computing a DC offset calibrating constant number and an I-Q imbalance calibrating constant number from a sub-sampled signal.Type: GrantFiled: August 5, 2016Date of Patent: October 3, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ik Soo Eo, Sang-Kyun Kim, Cheon Soo Kim, Jang Hong Choi
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Publication number: 20170257176Abstract: A method and device for calibrating a DC offset and an I-Q imbalance component of an RF transceiver, the method including inputting a test signal into a transmitter, and converting the test signal into an analogue test signal; converting the analogue test signal using a transmitting mixer; sub-sampling a signal output from the transmitting mixer; and computing a DC offset calibrating constant number and an I-Q imbalance calibrating constant number from a sub-sampled signal.Type: ApplicationFiled: August 5, 2016Publication date: September 7, 2017Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Ik Soo EO, Sang-Kyun Kim, Cheon Soo KIM, Jang Hong CHOI
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Patent number: 9712123Abstract: Provided is a power amplifier installed in wireless communication terminals and systems. According to one aspect of the present invention, a reconfigurable power amplifier capable of selecting a wide band frequency is provided. The reconfigurable power amplifier includes input transistors receiving a radio frequency (RF) signal and a reconfigurable adaptive power cell configured to select the wide band frequency by applying a common-gate bias voltage to a plurality of common-gate transistors with a plurality of separate common gates to amplify the RF signal.Type: GrantFiled: January 21, 2016Date of Patent: July 18, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Min Park, Baek-Hyun Kim, Cheon-Soo Kim, Song-Cheol Hong, Dong-Woo Kang, Jang-Hong Choi
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Patent number: 9509283Abstract: Disclosed is an interpolation filter based on time assignment algorithm. An interpolation filter comprises an enable signal generating part generating enable signals for operation of the interpolation filter, an input value generating part generating input values, a first calculating part generating a first output value based on a first enable signal and a first input value, a second calculating part generating a second output value based on a second enable signal and a second input value, and an output value selecting part selecting a final output value among the first output value and the second output value. Thus, continuity of output data can be guaranteed, and hardware can be shared by using time assignment algorithm so that a total size of the interpolation filter can be reduced.Type: GrantFiled: May 14, 2014Date of Patent: November 29, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Mi Jeong Park, Jang Hong Choi, Ik Soo Eo
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Publication number: 20160277049Abstract: Provided is a transmitter. The transmitter includes a signal combiner configured to amplify a first differential radio frequency (RF) signal modulated to be transmitted through a first frequency band and a second differential RF signal modulated to be transmitted through a second frequency band non-adjacent to the first frequency band and summate the amplified first differential RF signal and the amplified second differential RF signal in a current mode to generate an RF signal and a power amplifier configured to amplify the generated RF signal.Type: ApplicationFiled: March 18, 2016Publication date: September 22, 2016Inventors: Dong Woo KANG, Cheon Soo KIM, Jang Hong CHOI
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Publication number: 20160233838Abstract: Provided is a power amplifier installed in wireless communication terminals and systems. According to one aspect of the present invention, a reconfigurable power amplifier capable of selecting a wide band frequency is provided. The reconfigurable power amplifier includes input transistors receiving a radio frequency (RF) signal and a reconfigurable adaptive power cell configured to select the wide band frequency by applying a common-gate bias voltage to a plurality of common-gate transistors with a plurality of separate common gates to amplify the RF signal.Type: ApplicationFiled: January 21, 2016Publication date: August 11, 2016Inventors: Min PARK, Baek-Hyun KIM, Cheon-Soo KIM, Song-Cheol HONG, Dong-Woo KANG, Jang-Hong CHOI
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Publication number: 20160065254Abstract: Exemplary embodiments of the present invention relate to an RF transmitter supporting carrier aggregation and envelope tracking and an RF transmitter according to an embodiment of the present invention comprises an RF path configured to convert a carrier aggregation signal in which a plurality of component carriers belonging to a baseband are aggregated into an RF signal; an ET path configured to generate an envelope signal by calculating magnitudes of the plurality of component carriers, respectively, and adding the calculated each magnitude of the component carriers; and an amplifier configured to power-amplify the converted RF signal according to a bias voltage corresponding to the generated envelope signal. According to exemplary embodiments of the present invention, power amplification efficiency and data transmission efficiency are improved by applying carrier aggregation and envelope tracking.Type: ApplicationFiled: August 25, 2015Publication date: March 3, 2016Inventors: Mi-Jeong PARK, Mun-Yang PARK, Dong-Woo KANG, Jang-Hong CHOI
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Patent number: 9276800Abstract: The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.Type: GrantFiled: September 10, 2012Date of Patent: March 1, 2016Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Hyun Ho Boo, Seon-Ho Han, Jang Hong Choi, Ik Soo Eo, Hyun Kyu Yu
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Publication number: 20150019607Abstract: Disclosed is an interpolation filter based on time assignment algorithm. An interpolation filter comprises an enable signal generating part generating enable signals for operation of the interpolation filter, an input value generating part generating input values, a first calculating part generating a first output value based on a first enable signal and a first input value, a second calculating part generating a second output value based on a second enable signal and a second input value, and an output value selecting part selecting a final output value among the first output value and the second output value. Thus, continuity of output data can be guaranteed, and hardware can be shared by using time assignment algorithm so that a total size of the interpolation filter can be reduced.Type: ApplicationFiled: May 14, 2014Publication date: January 15, 2015Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: MI JEONG PARK, JANG HONG CHOI, IK SOO EO
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Patent number: 8542773Abstract: A digital RF converter, a digital RF modulator, and a transmitter are provided. The digital RF converter includes a delta-sigma modulated bits (DSMB) sub-block that generates a current magnitude corresponding to least-significant n bits among input signals at a first sampling speed, a least-significant bit (LSB) sub-block that generates a current magnitude corresponding to intermediate k bits among the input signals at a second sampling speed lower than the first sampling speed, and a most-significant bit (MSB) sub block that generates a current magnitude corresponding to most-significant m bits among the inputs signals at the second sampling speed.Type: GrantFiled: December 15, 2010Date of Patent: September 24, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Hyun Kyu Yu, Jang Hong Choi, Hyun Ho Boo, Pil Jae Park, Mun Yang Park, Seong Do Kim, Sun Bo Shim, Song Cheol Hong
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Patent number: 8471739Abstract: Provided is a digital analog converter that output currents having different magnitudes for a digital input value according to a mapping table. The digital analog converter includes: a plurality of current sources; and a calibration unit configured to sort index values for identifying the plurality of current sources according to current magnitudes of the current sources, couple each two current sources which are symmetrical left and right about the center of the sorted index values, and map the current source pairs into a mapping table.Type: GrantFiled: December 6, 2011Date of Patent: June 25, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Jang Hong Choi, Hyun Kyu Yu
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Publication number: 20130082756Abstract: The present invention provides a signal input device of a digital-RF converter including: a phase-modulated signal input unit configured to input a phase-modulated carrier signal to an LO switch of a digital-RF converter; and a digital signal input unit configured to correct a digital signal to correspond to the phase-modulated carrier signal, and input the corrected digital signal to a data switch of the digital-RF converter.Type: ApplicationFiled: September 13, 2012Publication date: April 4, 2013Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Jang Hong CHOI, Mun Yang PARK, Hyun Ho BOO, Seon-Ho HAN, Hyun Kyu YU