Abstract: The present invention provides a method of controlling a row address strobe path which can prevent an interference of a row address signal generated at the time of falling of a word line boosting signal at a row decoder by using a plurality of row address strobe signal having different disable time. The present invention reduces the overlap of signals which can be caused at the time of charging/discharging the word line of memory device by preventing the interference of row address at the time of falling of word line boosting signal which can be generated at the row decoder by controlling a word line boosting signal provided to a row decoder by using a first RAS signal outputted from a RAS buffer; and generating a second RAS signal by receiving and logically operating said first RAS signal and a signal delayed by a predetermined time by feeding back said first RAS signal, and controlling a row address signal provided to said row decoder by using said generated second RAS signal.

Abstract: A bit line sense amplifier driving circuit of a semiconductor memory device which has first and second refresh cycle functions includes a bit line sense amplifier driver unit for supplying a pull-up bias potential signal and a pull-down bias potential signal to a bit line sense amplifier; a bit line sense amplifier predriver unit for controlling the current flowing to the bit line sense amplifier driver unit; and a bit line sense amplifier predriver control unit for controlling the bit line sense amplifier predriver unit according to the first and second refresh cycle functions.