Abstract: Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The method for manufacturing the array substrate comprises: forming a pattern of an active layer of a switching thin-film transistor (TFT) and a pattern of a corresponding pixel electrode on a base substrate, in which the active layer of the switching TFT and the pixel electrode are on the same layer.

Abstract: Embodiments of the present invention relate to display technology field and provide a thin film transistor (1) and manufacturing method thereof, an array substrate, and a display device, and do not damage an active layer (12) of the thin film transistor while forming vias (16) over the source region (120) and the drain region (121) with via etching process. The thin film transistor (1) comprises a substrate (10), an active layer (12), a gate insulating layer (13), a gate (14) and an inter-layer insulating layer (17) disposed on the substrate (10), and further comprises: a conductive etching barrier layer (15) disposed on the active layer; the conductive etching barrier layer (15) being located to correspond to the source region (120) and the drain region (121) of the active layer (12) and vias (16) being formed over the source region (120) and the drain region (121) of the active layer (12) and not extending beyond edges of the conductive etching barrier layer (15).

Abstract: A method for forming low-temperature polysilicon thin film, a thin film transistor and a display device are provided. The method for forming low-temperature polysilicon thin film comprises: depositing an amorphous silicon thin film on a base substrate; covering the amorphous silicon thin film with an anti-reflective optical film; performing photolithography and etching on the anti-reflective optical film such that light condensing structures are provided in an array on the anti-reflective optical film; and irradiating the amorphous silicon thin film with the anti-reflective optical film covered by laser light such that the amorphous silicon film is converted into the low-temperature polysilicon thin film.

Abstract: An organic light emitting display device is provided. Thin film transistors may be located on a substrate. An insulating interlayer having a first contact hole to a third contact hole may be disposed on the substrate. First electrodes electrically connecting the thin film transistors may be located on the insulating interlayer and sidewalls of the first to the third contact holes. A pixel defining layer may be disposed on the insulating interlayer, portions of the first electrodes and the sidewalls of the first to the third contact holes. Light emitting structures may be disposed on the first electrodes in pixel regions. A second electrode may be located on the light emitting structures. Planarization patterns may be disposed on the pixel defining layer to fill the first and the second contact holes. A spacer may be disposed on the pixel defining layer to fill the third contact hole.

Abstract: Provided are a CMOS circuit structure, a preparation method thereof and a display device, wherein a PMOS region in the CMOS circuit structure is of a LTPS TFT structure, that is, the PMOS semiconductor layer is prepared from a P type doped polysilicon material; an NMOS region is of an Oxide TFT structure, that is, the NMOS semiconductor layer is made of an oxide material; three doping processes applied to the NMOS region during the LTPS process may be omitted in the case in which the NMOS semiconductor layer in the NMOS region is made of an oxide material instead of the polysilicon material, which may simplify the preparation of the CMOS circuit structure as well as reduce a production cost. Furthermore, it is only required to crystallizing the PMOS semiconductor layer, which may also extend the lifespan of laser tube, contributing to reduction of the production cost.

Abstract: A display includes a substrate main body, a thin film transistor (TFT) on the substrate main body, the TFT including an oxide semiconductor layer and a metal oxide film sequentially stacked on top of each other.

Abstract: An organic light emission diode (OLED) display device and a method of fabricating the same, wherein the OLED display device includes a substrate including a pixel region and a non-pixel region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, and including a channel region and source/drain regions, a gate electrode disposed to correspond to the channel region of the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, source/drain electrodes electrically connected to the source/drain regions of the semiconductor layer, and an interlayer insulating layer insulating the gate electrode from the source/drain electrodes, wherein areas of the buffer layer, the gate insulating layer and the interlayer insulating layer that are on the non-pixel region, respectively, are removed, and the partially removed area is 8% to 40% of a panel area.

Abstract: An organic light emitting display device is provided. Thin film transistors may be located on a substrate. An insulating interlayer having a first contact hole to a third contact hole may be disposed on the substrate. First electrodes electrically connecting the thin film transistors may be located on the insulating interlayer and sidewalls of the first to the third contact holes. A pixel defining layer may be disposed on the insulating interlayer, portions of the first electrodes and the sidewalls of the first to the third contact holes. Light emitting structures may be disposed on the first electrodes in pixel regions. A second electrode may be located on the light emitting structures. Planarization patterns may be disposed on the pixel defining layer to fill the first and the second contact holes. A spacer may be disposed on the pixel defining layer to fill the third contact hole.

Abstract: A display includes a substrate main body, a thin film transistor (TFT) on the substrate main body, the TFT including an oxide semiconductor layer and a metal oxide film sequentially stacked on top of each other.

Abstract: An organic light emitting display device that includes a plurality of signal lines and a plurality of scan lines, a plurality of pixels arranged at intersections of ones of the plurality of signal lines and ones of the plurality of scan lines, a scan driver to supply scan signals to the plurality of scan lines, the scan driver including a first plurality of thin film transistors and a data driver to supply data signals to the plurality of signal lines, the data driver including a second plurality of thin film transistors, wherein each of said plurality of pixels includes a first thin film transistor, a second thin film transistor and an organic light emitting diode, the first transistor being connected to the organic light emitting diode, the first transistor having an active layer made out of an oxide semiconductor, the second transistor, the first plurality of thin film transistors and the second plurality of thin film transistors each having an active layer made out of poly-silicon.

Abstract: An organic light emission diode (OLED) display device and a method of fabricating the same, wherein the OLED display device includes a substrate including a pixel region and a non-pixel region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, and including a channel region and source/drain regions, a gate electrode disposed to correspond to the channel region of the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, source/drain electrodes electrically connected to the source/drain regions of the semiconductor layer, and an interlayer insulating layer insulating the gate electrode from the source/drain electrodes, wherein areas of the buffer layer, the gate insulating layer and the interlayer insulating layer that are on the non-pixel region, respectively, are removed, and the partially removed area is 8% to 40% of a panel area.

Abstract: Disclosed are a crystallization pattern, and a method for crystallizing amorphous silicon. The method includes the steps of forming an amorphous silicon film on a glass substrate, forming a crystallization pattern by patterning the amorphous silicon film, and crystallizing the crystallization pattern into polycrystalline silicon by irradiating a laser onto the crystallization pattern. The crystallization pattern includes a peripheral region located within a first distance from an edge of the crystallization pattern, and an internal region located away from the edge of the crystallization pattern by more than the first distance. The internal region is divided into at least one sub-region, each sub-region includes one crystallization inducement pattern, and an edge of each sub-region is located within a second distance from the crystallization inducement pattern.

Abstract: A display device includes a thin film transistor (TFT) on a substrate, the TFT including source/drain electrodes, a cover layer on the source/drain electrodes, and a light source including at least one electrode, the electrode being electrically connected to the source/drain electrodes of the TFT through the cover layer, wherein the cover layer includes a same material as the electrode of the light source.

Abstract: Disclosed are a crystallization pattern, and a method for crystallizing amorphous silicon. The method includes the steps of forming an amorphous silicon film on a glass substrate, forming a crystallization pattern by patterning the amorphous silicon film, and crystallizing the crystallization pattern into polycrystalline silicon by irradiating a laser onto the crystallization pattern. The crystallization pattern includes a peripheral region located within a first distance from an edge of the crystallization pattern, and an internal region located away from the edge of the crystallization pattern by more than the first distance. The internal region is divided into at least one sub-region, each sub-region includes one crystallization inducement pattern, and an edge of each sub-region is located within a second distance from the crystallization inducement pattern.

Abstract: A method for forming a polycrystalline silicon thin film transistor. The method includes the steps of: forming a polycrystalline silicon layer including multiple protrusions by crystallizing the amorphous silicon layer according to a crystallization method in which the multiple protrusions are formed due to collision between crystal grains; patterning the polycrystalline silicon layer in an active pattern which includes only two protrusions of the multiple protrusions, which are apart from each other and located at both sides of a gate electrode-forming area; applying a barrier layer on the patterned polycrystalline silicon layer while partially covering the two protrusions; and forming a source electrode and a drain electrode at the protrusions of the polycrystalline silicon layer formed at both sides of the gate electrode-forming area by ion-implanting dopants into a resultant lamination.