Patents by Inventor Jason Duong
Jason Duong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240143232Abstract: A partition command from one of a plurality of write partition command queues or a plurality of read partition command queues is received. The received partition command is issued to a command processor of the sequencer component to be applied to one of the one or more memory devices. Responsive to receiving the partition command of the plurality of write partition command queues, whether a timeout threshold criterion pertaining to the plurality of read partition command queues is satisfied is determined. Responsive to determining that the timeout threshold criterion pertaining to the plurality of read partition command queues is not satisfied, whether a write threshold criterion pertaining to the plurality of write partition command queues is satisfied is determined.Type: ApplicationFiled: January 8, 2024Publication date: May 2, 2024Inventors: Juane Li, Fangfang Zhu, Jason Duong, Chih-Kuo Kao, Jiangli Zhu
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Patent number: 11965459Abstract: An air intake plenum for a gas turbine engine is provided that includes an axial centerline, first and second gas path surfaces, and a plurality of struts. The gas path surfaces are spaced apart from one another and define at least a portion of a plenum interior. The struts extend lengthwise between the gas path surfaces. Each strut has a cross-section geometry. The cross-section geometry has a center, and major and minor axes. The struts are circumferentially spaced apart from one another within the plenum. Each strut is oriented at a clocking angle theta. The clocking angle theta for each respective strut is disposed between the major axis of that strut and a line that intersects the cross-section geometry center of that strut and the axial centerline. At least one strut of the plurality of struts is oriented at a clocking angle theta that is greater than zero.Type: GrantFiled: April 18, 2022Date of Patent: April 23, 2024Assignee: PRATT & WHITNEY CANADA CORP.Inventors: Hien Duong, Jason Nichols
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Publication number: 20240126480Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive, from a host system, a command of a type; determine a weighted count of the command according to the type of the command; track, based on the weighted count, a first count of commands of the type; determine whether the first count of commands of the type satisfies a threshold criterion for commands of the type; and responsive to determining that the first count of commands of the type satisfies the threshold criterion, transmit a notification to the host system to refrain from transmitting commands of the type.Type: ApplicationFiled: December 6, 2023Publication date: April 18, 2024Inventors: Jason Duong, Fangfang Zhu, Jiangli Zhu, Juane Li, Chih-Kuo Kao
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Publication number: 20240113048Abstract: Various embodiments disclosed relate to embedded components in glass core layers for semiconductor assemblies. The present disclosure includes a semiconductor assembly with a glass core having one or more cavities and a component embedded into the glass core at the one or more cavities portion, the component at least partially embedded in the glass core, and a semiconductor die attached to the substrate.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Srinivasan Raman, Benjamin Duong, Jason Scott Steill, Shayan Kaviani, Srinivas Venkata Ramanuja Pietambaram, Suddhasattwa Nad, Brandon C. Marin, Gang Duan, Yi Yang
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Publication number: 20240113046Abstract: Various embodiments disclosed relate to embedded components in glass core layers for semiconductor assemblies. The present disclosure includes a semiconductor assembly with a glass core having one or more cavities and a component embedded into the glass core at the one or more cavities portion, the component at least partially embedded in the glass core, and a semiconductor die attached to the substrate.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Inventors: Jason Scott Steill, Shayan Kaviani, Srinivas Venkata Ramanuja Pietambaram, Suddhasattwa Nad, Benjamin Duong, Srinivasan Raman, Yi Yang
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Patent number: 11941290Abstract: A memory access command to be performed on a die of a memory device is received, wherein the memory access command comprises a base partition number and a base page address. The memory access command is converted into a plurality of commands based on a number of partitions associated with the die. A respective partition number derived from the base partition number is determined for each command of the plurality of commands. A respective page address associated with each command of the plurality of commands is determined using the base page address. The plurality of commands is executed using, for each command of the plurality of commands, the respective partition number and the respective page address.Type: GrantFiled: September 1, 2021Date of Patent: March 26, 2024Assignee: Micron Technology, Inc.Inventors: Bharani Rajendiran, Jason Duong, Chih-Kuo Kao, Fangfang Zhu
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Publication number: 20240078048Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.Type: ApplicationFiled: November 10, 2023Publication date: March 7, 2024Inventors: Juane Li, Fangfang Zhu, Jason Duong, Chih-Kuo Kao, Jiangli Zhu
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Patent number: 11899972Abstract: A partition command from one of a plurality of write partition command queues or a plurality of read partition command queues is received. The received partition command is issued to a command processor of the sequencer component to be applied to one of the one or more memory devices. Responsive to receiving the partition command of the plurality of write partition command queues, whether a timeout threshold criterion pertaining to the plurality of read partition command queues is satisfied is determined. Responsive to determining that the timeout threshold criterion pertaining to the plurality of read partition command queues is not satisfied, whether a write threshold criterion pertaining to the plurality of write partition command queues is satisfied is determined.Type: GrantFiled: August 19, 2021Date of Patent: February 13, 2024Assignee: Micron Technology, Inc.Inventors: Juane Li, Fangfang Zhu, Jason Duong, Chih-Kuo Kao, Jiangli Zhu
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Patent number: 11893280Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive a command of a first type from a host system. The processing device can select a threshold criterion for the command of the first type based on a count of commands of a second type. The processing device can determine whether a second count of commands of the first type satisfies the threshold criterion and in response to the second count satisfying the threshold criterion, the processing logic can transmit a notification to the host system to refrain from transmitting the commands of the first type.Type: GrantFiled: August 27, 2021Date of Patent: February 6, 2024Assignee: Micron Technology, Inc.Inventors: Jason Duong, Fangfang Zhu, Jiangli Zhu, Juane Li, Chih-Kuo Kao
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Patent number: 11847349Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.Type: GrantFiled: August 19, 2021Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventors: Juane Li, Fangfang Zhu, Jason Duong, Chih-Kuo Kao, Jiangli Zhu
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Patent number: 11726815Abstract: Methods, systems, and devices for scheduling command execution are described. A memory sub-system can schedule command execution according to a type of command received. For a read operation, a memory sub-system can receive read commands for multiple memory dice. The memory sub-system can select a first memory die and execute a first set of read commands associated with the first memory die. The memory sub-system can then select a second memory die and execute a second set of read commands associated with the second memory die.Type: GrantFiled: June 26, 2020Date of Patent: August 15, 2023Assignee: Micron Technology, Inc.Inventors: Jason Duong, Chih-Kuo Kao, Jiangli Zhu, Ying Yu Tai, Wei Wang
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Patent number: 11693597Abstract: A first command directed to a first package of a plurality of memory packages, wherein the first command is issued to a command processor to be applied to the first package is received. A total number of pending commands directed to the first package satisfies a first threshold criterion is determined. Responsive to determining that the total number of pending commands directed to the first package satisfies the first threshold criterion, whether a second command directed to a second package is requesting transmission is determined. Responsive to the second command directed to the second package is requesting transmission, whether the first command comprises a write command is determined. Responsive to determining that the first command comprises a write command, execute a command directed to the second package.Type: GrantFiled: August 19, 2021Date of Patent: July 4, 2023Assignee: Micron Technology, Inc.Inventors: Juane Li, Jason Duong, Fangfang Zhu, Chih-Kuo Kao, Jiangli Zhu
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Publication number: 20230064168Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive a command of a first type from a host system. The processing device can select a threshold criterion for the command of the first type based on a count of commands of a second type. The processing device can determine whether a second count of commands of the first type satisfies the threshold criterion and in response to the second count satisfying the threshold criterion, the processing logic can transmit a notification to the host system to refrain from transmitting the commands of the first type.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Inventors: Jason Duong, Fangfang Zhu, Jiangli Zhu, Juane Li, Chih-Kuo Kao
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Publication number: 20230066419Abstract: A memory access command to be performed on a die of a memory device is received, wherein the memory access command comprises a base partition number and a base page address. The memory access command is converted into a plurality of commands based on a number of partitions associated with the die. A respective partition number derived from the base partition number is determined for each command of the plurality of commands. A respective page address associated with each command of the plurality of commands is determined using the base page address. The plurality of commands is executed using, for each command of the plurality of commands, the respective partition number and the respective page address.Type: ApplicationFiled: September 1, 2021Publication date: March 2, 2023Inventors: Bharani Rajendiran, Jason Duong, Chih-Kuo Kao, Fangfang Zhu
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Publication number: 20230056808Abstract: A first command directed to a first package of a plurality of memory packages, wherein the first command is issued to a command processor to be applied to the first package is received. A total number of pending commands directed to the first package satisfies a first threshold criterion is determined. Responsive to determining that the total number of pending commands directed to the first package satisfies the first threshold criterion, whether a second command directed to a second package is requesting transmission is determined. Responsive to the second command directed to the second package is requesting transmission, whether the first command comprises a write command is determined. Responsive to determining that the first command comprises a write command, execute a command directed to the second package.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Inventors: Juane Li, Jason Duong, Fangfang Zhu, Chih-Kuo Kao, Jiangli Zhu
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Publication number: 20230054363Abstract: A partition command from one of a plurality of write partition command queues or a plurality of read partition command queues is received. The received partition command is issued to a command processor of the sequencer component to be applied to one of the one or more memory devices. Responsive to receiving the partition command of the plurality of write partition command queues, whether a timeout threshold criterion pertaining to the plurality of read partition command queues is satisfied is determined. Responsive to determining that the timeout threshold criterion pertaining to the plurality of read partition command queues is not satisfied, whether a write threshold criterion pertaining to the plurality of write partition command queues is satisfied is determined.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Inventors: Juane Li, Fangfang Zhu, Jason Duong, Chih-Kuo Kao, Jiangli Zhu
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Publication number: 20230058232Abstract: A die command from a requestor is received. The die command into a die command queue is stored. The die command from the die command queue into a plurality of partition commands is partitioned. The plurality of partition commands into one of a first plurality of partition command queues or a second plurality of partition command queues is mapped. The partition command of the first plurality of partition command queues or the second plurality of partition command queues is issued to a command processor to be applied to the one or more memory devices.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Inventors: Juane Li, Jason Duong, Fangfang Zhu, Chih-Kuo Kao, Jiangli Zhu
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Publication number: 20230056287Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.Type: ApplicationFiled: August 19, 2021Publication date: February 23, 2023Inventors: Juane Li, Fangfang Zhu, Jason Duong, Chih-Kuo Kao, Jiangli Zhu
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Publication number: 20210271421Abstract: A processing device in a memory system determines that a number of commands from an active queue that have been executed on a memory device does not satisfy an executed transaction threshold criterion, that a number of pending commands in an inactive queue satisfies a first promotion threshold criterion, and that a number of pending commands in the active queue does not satisfy a second promotion threshold criterion. In response, the processing device switches an execution grant from the active queue to the inactive queue.Type: ApplicationFiled: May 21, 2021Publication date: September 2, 2021Inventors: Jiangli Zhu, Wei Wang, Ying Yu Tai, Jason Duong, Chih-Kuo Kao
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Patent number: 11048437Abstract: A processing device in a memory system provides an execution grant to a first queue of a plurality of queues, the first queue storing a first plurality of memory commands to be executed on the memory component. The processing device further determines whether a number of commands from the first queue that have been executed since the first queue received the execution grant satisfies an executed transaction threshold criterion and whether a number of pending commands in a second queue of the plurality of queues satisfies a promotion threshold criterion, the second queue storing a second plurality of memory commands to be executed on the memory component. Responsive to at least one of the executed transaction threshold criterion or the promotion threshold criterion being satisfied, the processing device provides the execution grant to the second queue.Type: GrantFiled: February 28, 2019Date of Patent: June 29, 2021Assignee: Micron Technology, Inc.Inventors: Jiangli Zhu, Wei Wang, Ying Yu Tai, Jason Duong, Chih-Kuo Kao