Abstract: A system and method for providing compliant mapping between chip bond locations of an IC and corresponding package bond locations is disclosed. Package design information including package bond location information relating to the IC package and IC mask data including chip bond location information relating to the IC chip are integrated such that an internal physical design verification tool is operable to verify compliance between package bond locations and chip bond locations.

Abstract: Systems and methods can be employed to sample a signal and determine a frequency of the signal. In one embodiment, the system may comprise a sample network that provides plural indications of signal state associated with different time instances of an input signal. A detector provides an indication of frequency for the input signal based on the plural indications of signal state.

Abstract: An embodiment of this invention provides a circuit and method for reducing the number of electronic components needed to calibrate circuits on an IC. A multiplexer is located on the IC where the outputs of a plurality of circuits located on the IC are each connected to a separate data input of the multiplexer. The control input of the multiplexer selects which data input of the multiplexer is connected to an external component. Each data input is individually connected to the component periodically.

Abstract: A method and structure for external control of an electrostatic discharge (ESD) protection of electronic devices. According to the structure, one or more shunt circuits are coupled to the electronic devices and one or more external contacts are coupled to the one or more shunt circuits. One or more power supplies are further coupled to the one or more shunt circuits prior to the shunt circuits being coupled to the electronic devices. According to the method, the one or more external contacts are operable to be used to perform on or more of: grounding one or more of one or more external contacts coupled to the one or more shunt circuits, supplying one or more DC signals to one or more of the one or more shunt circuits via one or more of the one or more external contacts, and supplying one or more AC signals to one or more of the one or more shunt circuits via one or more of the one or more external contacts.

Abstract: A method and structure for active power control of a power supply element coupled to an electronic circuit. The structure comprises a control element coupled to the electronic circuit, said control element comprising one or more of a phase detector, a counter, a level detector, a voltage controlled oscillator, and one or more transistive elements wherein the control element is operable to measure one or more oscillations of a power supply signal of the power supply element. The structure further comprises a stabilization element coupled to the control element and coupled to the circuit, comprising one or more capacitive elements, one or more transistive elements and one or more resistive elements, wherein said one or more capacitive elements, one or more transistive elements and one or more resistive elements are operable to mitigate one or more oscillations of the power supply signal of the power supply element.

Abstract: Systems and methods can be employed to synchronize devices. One embodiment may include a system that includes an input that receives a synchronization signal having a frequency, and an oscillator that provides a clock signal having a frequency. The oscillator adjusts the frequency of the clock signal based on a comparison of an indication of the frequency for the synchronization signal and a corresponding indication of the frequency for the clock signal.

Abstract: A method and structure for control of a rise time of a bus signal coupled to a driver circuit. A bus is coupled to the driver circuit and is operable to carry the bus signal. Voltage control elements are coupled to the driver circuit and the bus, and are operable to increase or decrease a voltage of the bus signal relative to a ground at one or more time instants. A control circuit coupled to the voltage control elements is operable to control the switching of the voltage control elements, thereby controlling the voltage level of the bus signal. Controlling a rise time of the bus signal of the driver circuit includes adaptively adjusting a voltage level of the bus signal relative to a ground at one or more discrete times by the use of the voltage control elements.

Abstract: A method and structure for providing dynamic control of a slew rate of an electronic circuit. The structure has a signal line that is coupled to a number of capacitive elements that may be selectively switched in or out of the electronic circuit in order to provide precise control of the slew rate of the electronic circuit. A control element switches the capacitive elements into the signal line so that the slew rate may be precisely controlled at one or more time instants. The method includes determining a desired slew rate of the electronic circuit. Based upon the desired value of the slew rate, one or more of the capacitive elements are switched into the signal line at one or more time instants without changing an output impedance of the electronic circuit.

Abstract: A method and structure for external control of an electrostatic discharge (ESD) protection of electronic devices. According to the structure, one or more shunt circuits are coupled to the electronic devices and one or more external contacts are coupled to the one or more shunt circuits. One or more power supplies are further coupled to the one or more shunt circuits prior to the shunt circuits being coupled to the electronic devices. According to the method, the one or more external contacts are operable to be used to perform on or more of: grounding one or more of one or more external contacts coupled to the one or more shunt circuits, supplying one or more DC signals to one or more of the one or more shunt circuits via one or more of the one or more external contacts, and supplying one or more AC signals to one or more of the one or more shunt circuits via one or more of the one or more external contacts.

Abstract: A method and structure for providing dynamic control of a slew rate of an electronic circuit. The structure has a signal line that is coupled to a number of capacitive elements that may be selectively switched in or out of the electronic circuit in order to provide precise control of the slew rate of the electronic circuit. A control element switches the capacitive elements into the signal line so that the slew rate may be precisely controlled at one or more time instants. The method includes determining a desired slew rate of the electronic circuit. Based upon the desired value of the slew rate, one or more of the capacitive elements are switched into the signal line at one or more time instants without changing an output impedance of the electronic circuit.

Abstract: A method and structure for control of a rise time of a bus signal coupled to a driver circuit. A bus is coupled to the driver circuit and is operable to carry the bus signal. Voltage control elements are coupled to the driver circuit and the bus, and are operable to increase or decrease a voltage of the bus signal relative to a ground at one or more time instants. A control circuit coupled to the voltage control elements is operable to control the switching of the voltage control elements, thereby controlling the voltage level of the bus signal. Controlling a rise time of the bus signal of the driver circuit includes adaptively adjusting a voltage level of the bus signal relative to a ground at one or more discrete times by the use of the voltage control elements.

Abstract: A method and structure for active power control of a power supply element coupled to an electronic circuit. The structure comprises a control element coupled to the electronic circuit, said control element comprising one or more of a phase detector, a counter, a level detector, a voltage controlled oscillator, and one or more transistive elements wherein the control element is operable to measure one or more oscillations of a power supply signal of the power supply element. The structure further comprises a stabilization element coupled to the control element and coupled to the circuit, comprising one or more capacitive elements, one or more transistive elements and one or more resistive elements, wherein said one or more capacitive elements, one or more transistive elements and one or more resistive elements are operable to mitigate one or more oscillations of the power supply signal of the power supply element.

Abstract: Devices, systems and methods for facilitating positioning of a cursor on a display device are provided. For example, an input device is provided which includes a shifter configured to electrically communicate with a computer. The shifter is configured to enable functional information, provided by a mouse-type input device, to provide selected functionality of the cursor. The shifter provides a shift-disable mode and a shift-enable mode so that, while in the shift-disable mode, the shifter enables the mouse-type input device to influence movement of the cursor on the display device. For instance, a movement of the mouse-type input device in a first direction and a first distance results in the cursor moving the first direction and a corresponding second distance.

Abstract: An embodiment of the invention provides an improved method and system for joining computer-generated rectangles by a mask designer. The improved method first selects the first rectangle to be connected and connects a second rectangle to the first. Next, an orthogonal route is traced to the third rectangle to be connected by identifying specific points between the first and the third rectangles. After identifying the orthogonal route, the area around the last specified point is zoomed in on. Next, the third rectangle is identified. Finally, after identifying the third rectangle, the second is connected to the first and third rectangles with the same width as the width of the first or third triangle and the length defined by the orthogonal route.

Abstract: A system and method for providing compliant mapping between chip bond locations of an IC and corresponding package bond locations is disclosed. Package design information including package bond location information relating to the IC package and IC mask data including chip bond location information relating to the IC chip are integrated such that an internal physical design verification tool is operable to verify compliance between package bond locations and chip bond locations.

Abstract: A circuit for altering a chip pad signal incorporates a primary driver that is configured to deliver a chip pad signal to an IC package. The circuit also is configured to cooperate with a second signal and a third signal, with the second signal having a voltage higher than the voltage of the first logic high, and the third signal having a voltage lower than the voltage of the first logic low. So configured, the primary driver may selectively deliver a second logic high, which has a voltage higher than the voltage of the first logic high, to the IC package, and may selectively deliver a second logic low, which has a voltage lower than the voltage of the first logic low, to the IC package. Electronic devices, systems and methods also are provided.

Abstract: A preferred method includes the steps of: sampling at least one of the signals at the chip pad (12, 404, 406) corresponding thereto to detect signal reflections, and; adjusting the at least one of the signals at the chip pad so that line delay and/or signal reflections are modified. So provided, performance of the integrated circuit (10, 402) is improved as compared with the performance of the integrated circuit prior to the step of adjusting. Systems also are provided.

Abstract: A circuit for altering a chip pad signal incorporates a primary driver that is configured to deliver a chip pad signal to an IC package. The circuit also is configured to cooperate with a second signal and a third signal, with the second signal having a voltage higher than the voltage of the first logic high, and the third signal having a voltage lower than the voltage of the first logic low. So configured, the primary driver may selectively deliver a second logic high, which has a voltage higher than the voltage of the first logic high, to the IC package, and may selectively deliver a second logic low, which has a voltage lower than the voltage of the first logic low, to the IC package. Electronic devices, systems and methods also are provided.

Abstract: A circuit for altering a chip pad signal incorporates a primary driver that is configured to deliver a chip pad signal to an IC package. The circuit also is configured to cooperate with a second signal and a third signal, with the second signal having a voltage higher than the voltage of the first logic high, and the third signal having a voltage lower than the voltage of the first logic low. So configured, the primary driver may selectively deliver a second logic high, which has a voltage higher than the voltage of the first logic high, to the IC package, and may selectively deliver a second logic low, which has a voltage lower than the voltage of the first logic low, to the IC package. Electronic devices, systems and methods also are provided.