Patents by Inventor Jason M. Surprise
Jason M. Surprise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11775634Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a graphics processor; and a graphics driver to facilitate access to the graphics processor, the graphics driver including: an authenticator to establish a trusted channel between the graphics driver and an application driver via mutual authentication of the graphics driver and the application driver; an offloader to offload a computing task to the graphics processor via the trusted channel, the computing task associated with the application driver; and a hypervisor to monitor memory associated with the offloaded computing task for an unauthorized access attempt.Type: GrantFiled: January 28, 2020Date of Patent: October 3, 2023Assignee: MCAFEE, LLCInventors: Paritosh Saxena, Adrian M. M. T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Publication number: 20200167467Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a graphics processor; and a graphics driver to facilitate access to the graphics processor, the graphics driver including: an authenticator to establish a trusted channel between the graphics driver and an application driver via mutual authentication of the graphics driver and the application driver; an offloader to offload a computing task to the graphics processor via the trusted channel, the computing task associated with the application driver; and a hypervisor to monitor memory associated with the offloaded computing task for an unauthorized access attempt.Type: ApplicationFiled: January 28, 2020Publication date: May 28, 2020Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 10572660Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: GrantFiled: February 1, 2018Date of Patent: February 25, 2020Assignee: McAfee, LLCInventors: Paritosh Saxena, Adrian M. M. T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 10073972Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: GrantFiled: October 25, 2014Date of Patent: September 11, 2018Assignee: MCAFEE, LLCInventors: Paritosh Saxena, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 10061919Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: GrantFiled: June 23, 2017Date of Patent: August 28, 2018Assignee: McAfee, LLCInventors: Paritosh Saxena, Adrian M. M. T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 10026150Abstract: Methods, apparatus and articles of manufacture for graphics processing of a vertex buffer using a relative index buffer are disclosed. Example methods to process a vertex buffer disclosed herein include accessing a first relative index stored in a relative index buffer, the first relative index specifying an offset from a current index selecting a first entry of the vertex buffer. Such disclosed example methods also include, in response to the first relative index being a nonzero value, processing data associated with a second entry of the vertex buffer to determine a rasterizer output associated with the first entry of the vertex buffer, the second entry of the vertex buffer being selected using the current index offset by the first relative index.Type: GrantFiled: December 21, 2016Date of Patent: July 17, 2018Assignee: INTEL CORPORATIONInventors: Jacob N. Smith, Jason M. Surprise, Zack S. Waters
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Publication number: 20180157832Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: ApplicationFiled: February 1, 2018Publication date: June 7, 2018Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 9898340Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: GrantFiled: June 23, 2017Date of Patent: February 20, 2018Assignee: MCAFEE, INC.Inventors: Paritosh Saxena, Adrian M. M. T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 9824413Abstract: Methods and apparatus relating to sort-free threading model for a multi-threaded graphics pipeline are described. In an embodiment, draw requests, corresponding to one or more primitives in an image, are stored in entries of a queue (e.g., in the order received). Each entry remains locked until both a front-end and a back-end of a graphics pipeline have completed one or more operations associated with the draw request. Other embodiments are also disclosed and claimed.Type: GrantFiled: November 15, 2014Date of Patent: November 21, 2017Assignee: Intel CorporationInventors: Jason M. Surprise, Zack S. Waters
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Publication number: 20170293758Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: ApplicationFiled: June 23, 2017Publication date: October 12, 2017Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Publication number: 20170286172Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: ApplicationFiled: June 23, 2017Publication date: October 5, 2017Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Patent number: 9690928Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: GrantFiled: October 25, 2014Date of Patent: June 27, 2017Assignee: McAfee, Inc.Inventors: Paritosh Saxena, Adrian M. M. T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Publication number: 20170169538Abstract: Methods, apparatus and articles of manufacture for graphics processing of a vertex buffer using a relative index buffer are disclosed. Example methods to process a vertex buffer disclosed herein include accessing a first relative index stored in a relative index buffer, the first relative index specifying an offset from a current index selecting a first entry of the vertex buffer. Such disclosed example methods also include, in response to the first relative index being a nonzero value, processing data associated with a second entry of the vertex buffer to determine a rasterizer output associated with the first entry of the vertex buffer, the second entry of the vertex buffer being selected using the current index offset by the first relative index.Type: ApplicationFiled: December 21, 2016Publication date: June 15, 2017Inventors: Jacob N. Smith, Jason M. Surprise, Zack S. Waters
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Patent number: 9536278Abstract: Methods, apparatus and articles of manufacture for graphics processing of a vertex buffer using a relative index buffer are disclosed. Example methods to process a vertex buffer disclosed herein include accessing a first relative index stored in a relative index buffer, the first relative index specifying an offset from a current index selecting a first entry of the vertex buffer. Such disclosed example methods also include, in response to the first relative index being a nonzero value, processing data associated with a second entry of the vertex buffer to determine a rasterizer output associated with the first entry of the vertex buffer, the second entry of the vertex buffer being selected using the current index offset by the first relative index.Type: GrantFiled: November 27, 2013Date of Patent: January 3, 2017Assignee: Intel CorporationInventors: Jacob N. Smith, Jason M. Surprise, Zack S. Waters
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Publication number: 20160328562Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: ApplicationFiled: October 25, 2014Publication date: November 10, 2016Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Jason M. Surprise
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Publication number: 20160140684Abstract: Methods and apparatus relating to sort-free threading model for a multi-threaded graphics pipeline are described. In an embodiment, draw requests, corresponding to one or more primitives in an image, are stored in entries of a queue (e.g., in the order received). Each entry remains locked until both a front-end and a back-end of a graphics pipeline have completed one or more operations associated with the draw request. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: November 15, 2014Publication date: May 19, 2016Applicant: Intel CorporationInventors: JASON M. SURPRISE, ZACK S. WATERS
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Publication number: 20160117497Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: ApplicationFiled: October 25, 2014Publication date: April 28, 2016Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Craig D. Schmugar, Jason M. Surprise
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Publication number: 20160117498Abstract: Computing platform security methods and apparatus are disclosed. An example apparatus includes a security application to configure a security task, the security task to detect a malicious element on a computing platform, the computing platform including a central processing unit and a graphics processing unit; and an offloader to determine whether the central processing unit or the graphics processing unit is to execute the security task; and when the graphics processing unit is to execute the security task, offload the security task to the graphics processing unit for execution.Type: ApplicationFiled: October 25, 2014Publication date: April 28, 2016Inventors: Paritosh Saxena, Adrian M.M.T. Dunbar, Michael S. Hughes, John Teddy, David Michael Durham, Balaji Vembu, Prashant Dewan, Debra Cablao, Nicholas D. Triantafillou, Craig D. Schmugar, Jason M. Surprise
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Publication number: 20150145880Abstract: Methods, apparatus and articles of manufacture for graphics processing of a vertex buffer using a relative index buffer are disclosed. Example methods to process a vertex buffer disclosed herein include accessing a first relative index stored in a relative index buffer, the first relative index specifying an offset from a current index selecting a first entry of the vertex buffer. Such disclosed example methods also include, in response to the first relative index being a nonzero value, processing data associated with a second entry of the vertex buffer to determine a rasterizer output associated with the first entry of the vertex buffer, the second entry of the vertex buffer being selected using the current index offset by the first relative index.Type: ApplicationFiled: November 27, 2013Publication date: May 28, 2015Inventors: Jacob N. Smith, Jason M. Surprise, Zack S. Waters
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Patent number: 8413115Abstract: In accordance with certain embodiments of the present disclosure, specifying integration points of a system-of-systems includes identifying an integration point that associates interfaces of system components. The integration point is characterized according to the identification to generate a set of attributes describing the interfaces. The integration point is specified according to the set of attributes.Type: GrantFiled: August 27, 2009Date of Patent: April 2, 2013Assignee: Raytheon CompanyInventors: Jason M. Surprise, Kristina L. Stewart, Stephen P. Marra, Suzanne P. Hassell