Patents by Inventor Jason Saito

Jason Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240177419
    Abstract: Methods, systems, and storage media for modeling subjects in a virtual environment are disclosed. Exemplary implementations may: receiving, from a client device, image data including at least one subject; extracting, from the image data, a face of the at least one subject and an object interacting with the face, wherein the object may be glasses worn by the subject; generating a set of face primitives based on the face, the set of face primitives comprising geometry and appearance information; generating a set of object primitives based on a set of latent codes for the object; generating an appearance model of photometric interactions between the face and the object; and rendering an avatar in the virtual environment based on the appearance model, the set of face primitives, and the set of object primitives.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 30, 2024
    Inventors: Shunsuke Saito, Junxuan Li, Tomas Simon Kreuz, Jason Saragih, Shun Iwase, Timur Bagautdinov, Rohan Joshi, Fabian Andres Prada Nino, Takaaki Shiratori, Yaser Sheikh, Stephen Anthony Lombardi
  • Publication number: 20240095090
    Abstract: A cloud-based framework dynamically utilizes a distributed pool of accelerators to parallelize calculations of physical simulation (physics) solver code partitioned across multiple accelerators and compute nodes of one or more virtual data centers in a virtualized computing environment. Multi-level partitioning logic of the framework partitions an input data set of the physics solver code into code groups configured to run on the accelerators using a “hardware agnostic” software layer that abstracts differences in processing architectures to allow targeting of different types of accelerators. A predictive scheduler interacts with the multi-level partitioning logic to locate and predictively reserve the accelerators within the pool, dynamically access and utilize the accelerators when needed, and then promptly release them upon completion of the calculations.
    Type: Application
    Filed: June 17, 2022
    Publication date: March 21, 2024
    Inventors: Yasushi Saito, Thomas D. Economon, Michael Thomas Mara, Jason Ansel Lango, Juan José Alonso
  • Publication number: 20240094642
    Abstract: A wafer shape metrology system includes a wafer shape metrology sub-system configured to perform one or more stress-free shape measurements on a first wafer, a second wafer, and a post-bonding pair of the first and second wafers. The wafer shape metrology system includes a controller communicatively coupled to the wafer shape metrology sub-system. The controller is configured to receive stress-free shape measurements from the wafer shape sub-system; predict overlay between one or more features on the first wafer and the second wafer based on the stress-free shape measurements of the first wafer, the second wafer, and the post-bonding pair of the first wafer and the second wafer; and provide a feedback adjustment to one or more process tools based on the predicted overlay. Additionally, feedforward and feedback adjustments may be provided to one or more process tools.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: Franz Zach, Mark D. Smith, Xiaomeng Shen, Jason Saito, David Owen
  • Patent number: 11829077
    Abstract: A wafer shape metrology system includes a wafer shape metrology sub-system configured to perform one or more stress-free shape measurements on a first wafer, a second wafer, and a post-bonding pair of the first and second wafers. The wafer shape metrology system includes a controller communicatively coupled to the wafer shape metrology sub-system. The controller is configured to receive stress-free shape measurements from the wafer shape sub-system; predict overlay between one or more features on the first wafer and the second wafer based on the stress-free shape measurements of the first wafer, the second wafer, and the post-bonding pair of the first wafer and the second wafer; and provide a feedback adjustment to one or more process tools based on the predicted overlay. Additionally, feedforward and feedback adjustments may be provided to one or more process tools.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: November 28, 2023
    Assignee: KLA Corporation
    Inventors: Franz Zach, Mark D. Smith, Xiaomeng Shen, Jason Saito, David Owen
  • Publication number: 20220187718
    Abstract: A wafer shape metrology system includes a wafer shape metrology sub-system configured to perform one or more stress-free shape measurements on a first wafer, a second wafer, and a post-bonding pair of the first and second wafers. The wafer shape metrology system includes a controller communicatively coupled to the wafer shape metrology sub-system. The controller is configured to receive stress-free shape measurements from the wafer shape sub-system; predict overlay between one or more features on the first wafer and the second wafer based on the stress-free shape measurements of the first wafer, the second wafer, and the post-bonding pair of the first wafer and the second wafer; and provide a feedback adjustment to one or more process tools based on the predicted overlay. Additionally, feedforward and feedback adjustments may be provided to one or more process tools.
    Type: Application
    Filed: January 28, 2021
    Publication date: June 16, 2022
    Applicant: KLA Corporation
    Inventors: Franz Zach, Mark D. Smith, Xiaomeng Shen, Jason Saito, David Owen
  • Patent number: 11049720
    Abstract: A method of using removable opaque coating for accurate optical topography measurements on top surfaces of transparent films includes: depositing a highly reflective coating onto a top surface of a wafer, measuring topography on the highly reflective coating, and removing the highly reflective coating from the wafer. The highly reflective coating includes an organic material. The highly reflective coating comprises a refractive index value between one and two. The highly reflective coating comprises a complex wavelength greater than one at six-hundred and thirty-five nanometers. The highly reflective coating reflects at least twenty percent of incident light. The highly reflective coating when deposited maintains an underlayer pattern topography at a resolution of forty by forty micrometers. The highly reflective coating does not cause destructive stress to the wafer.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: June 29, 2021
    Assignee: KLA Corporation
    Inventors: Dieter Mueller, Prasanna Dighe, Xiaomeng Shen, Jason Saito
  • Publication number: 20200126786
    Abstract: A method of using removable opaque coating for accurate optical topography measurements on top surfaces of transparent films includes: depositing a highly reflective coating onto a top surface of a wafer, measuring topography on the highly reflective coating, and removing the highly reflective coating from the wafer. The highly reflective coating includes an organic material. The highly reflective coating comprises a refractive index value between one and two. The highly reflective coating comprises a complex wavelength greater than one at six-hundred and thirty-five nanometers. The highly reflective coating reflects at least twenty percent of incident light. The highly reflective coating when deposited maintains an underlayer pattern topography at a resolution of forty by forty micrometers. The highly reflective coating does not cause destructive stress to the wafer.
    Type: Application
    Filed: October 9, 2019
    Publication date: April 23, 2020
    Inventors: Dieter Mueller, Prasanna Dighe, Xiaomeng Shen, Jason Saito
  • Patent number: 7728969
    Abstract: Various methods and systems for identifying defect types on a wafer are provided. One computer-implemented method for identifying defect types on a wafer includes acquiring output of an inspection system for defects detected on a wafer. The output is acquired by different combinations of illumination and collection channels of the inspection system. The method also includes identifying defect types of the defects based on the output acquired by a set of the different combinations. The set of the different combinations is selected based on the defect types to be identified on the wafer and a wafer type of the wafer such that a different set of the different combinations of the illumination and collection channels is used for identifying different defect types on different wafer types.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: June 1, 2010
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Jason Saito, Wei-Ning Shen
  • Publication number: 20080129988
    Abstract: Various methods and systems for identifying defect types on a wafer are provided. One computer-implemented method for identifying defect types on a wafer includes acquiring output of an inspection system for defects detected on a wafer. The output is acquired by different combinations of illumination and collection channels of the inspection system. The method also includes identifying defect types of the defects based on the output acquired by a set of the different combinations. The set of the different combinations is selected based on the defect types to be identified on the wafer and a wafer type of the wafer such that a different set of the different combinations of the illumination and collection channels is used for identifying different defect types on different wafer types.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 5, 2008
    Inventors: Jason Saito, Wei-Ning Shen