Patents by Inventor Jason Ziller

Jason Ziller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5884088
    Abstract: A computer system is provided for monitoring the activity of a bus controller of a processor and responsive thereto for controlling the power consumption of a target controller such as a memory controller coupled to the bus controller. The computer system includes a bus, a processor having a bus controller coupled to the bus, and a bus activity monitor, coupled to the bus controller, generating a bus activity signal indicative of activity in the bus controller. The computer system also includes a target controller, coupled to the bus controller, for controlling the exchange of information between the processor and a target circuit. The target controller has an input for receiving a sequencing signal. The computer system additionally includes a power management circuit for controlling a power consumption of the target controller. The power management circuit has an input for receiving the bus activity signal and, an output for generating the sequencing signal in response to the bus activity signal.
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: March 16, 1999
    Assignee: Intel Corporation
    Inventors: James P. Kardach, Chih-Hung Chung, Jason Ziller
  • Patent number: 5692202
    Abstract: A computer system for monitoring the activity of a bus controller of a processor and responsive thereto for controlling the power consumption of a target controller such as a memory controller coupled to the bus controller. The computer system includes a bus, a processor having a bus controller coupled to the bus, and a bus activity monitor, coupled to the bus controller, generating a bus activity signal indicative of activity in the bus controller. The computer system also includes a target controller, coupled to the bus controller, for controlling the exchange of information between the processor and a target circuit. The target controller has an input for receiving a sequencing signal. The computer system additionally includes a power management circuit for controlling a power consumption of the target controller. The power management circuit has an input for receiving the bus activity signal and, an output for generating the sequencing signal in response to the bus activity signal.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: November 25, 1997
    Assignee: Intel Corporation
    Inventors: James P. Kardach, Chih-Hung Chung, Jason Ziller