Patents by Inventor Jaspreet Gandhi

Jaspreet Gandhi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9881858
    Abstract: Apparatuses and methods for formation of a bond site including an opening with a discontinuous profile are disclosed herein. An example apparatus may at least include a substrate, a contact on the substrate, and a mask layer formed on the substrate and at least a portion of the contact. The mask layer may also include an opening formed therein, with the opening having a discontinuous profile from a top surface of the mask layer to the contact.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: January 30, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Jaspreet Gandhi, Dale Arnold
  • Publication number: 20170018489
    Abstract: Apparatuses and methods for formation of a bond site including an opening with a discontinuous profile are disclosed herein. An example apparatus may at least include a substrate, a contact on the substrate, and a mask layer formed on the substrate and at least a portion of the contact. The mask layer may also include an opening formed therein, with the opening having a discontinuous profile from a top surface of the mask layer to the contact.
    Type: Application
    Filed: July 13, 2015
    Publication date: January 19, 2017
    Inventors: Jaspreet Gandhi, Dale Arnold
  • Patent number: 9153520
    Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: October 6, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li, Shijian Luo, Luke G. England, Brent Keeth, Jaspreet Gandhi
  • Publication number: 20130299868
    Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 14, 2013
    Inventors: Owen Fay, Xiao Li, Josh Woodland, Shijian Luo, Jaspreet Gandhi, Te-Sung Wu
  • Patent number: 8492242
    Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: July 23, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Owen Fay, Xiao Li, Josh Woodland, Shijian Luo, Jaspreet Gandhi, Te-Sung Wu
  • Publication number: 20130119528
    Abstract: Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies.
    Type: Application
    Filed: September 13, 2012
    Publication date: May 16, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li, Shijian Luo, Luke G. England, Brent Keeth, Jaspreet Gandhi
  • Patent number: 8436386
    Abstract: Solid state lighting devices having side reflectivity and associated methods of manufacturing are disclosed herein. In one embodiment, a method of forming a solid state lighting device includes attaching a solid state emitter to a support substrate, mounting the solid state emitter and support substrate to a temporary carrier, and cutting kerfs through the solid state emitter and the substrate to separate individual dies. The solid state emitter can have a first semiconductor material, a second semiconductor material, and an active region between the first and second semiconductor materials. The individual dies can have sidewalls that expose the first semiconductor material, active region and second semiconductor material. The method can further include applying a reflective material into the kerfs and along the sidewalls of the individual dies.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: May 7, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Jaspreet Gandhi, Tongbi Jiang
  • Publication number: 20120305957
    Abstract: Solid state lighting devices having side reflectivity and associated methods of manufacturing are disclosed herein. In one embodiment, a method of forming a solid state lighting device includes attaching a solid state emitter to a support substrate, mounting the solid state emitter and support substrate to a temporary carrier, and cutting kerfs through the solid state emitter and the substrate to separate individual dies. The solid state emitter can have a first semiconductor material, a second semiconductor material, and an active region between the first and second semiconductor materials. The individual dies can have sidewalls that expose the first semiconductor material, active region and second semiconductor material. The method can further include applying a reflective material into the kerfs and along the sidewalls of the individual dies.
    Type: Application
    Filed: June 3, 2011
    Publication date: December 6, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jaspreet Gandhi, Tongbi Jiang
  • Publication number: 20110291146
    Abstract: Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner.
    Type: Application
    Filed: May 25, 2010
    Publication date: December 1, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Owen Fay, Xiao Li, Josh Woodland, Shijian Luo, Jaspreet Gandhi, Te-Sung Wu
  • Publication number: 20070056469
    Abstract: A method of treating a substrate, such as a metal surface, by application of a silane coating composition containing at least one water-soluble or dispersible silane and a polymeric resin, which may be provided as a water-based dispersion of polymeric resin, the polymeric resin being present in an amount less than 10% by weight of the composition to slow the rate of corrosion of the metal surface and/or to promote adhesion of rubber thereto. The at least one silane can include a bis-amino silane, a vinyl silane, a bis-sulfur silane, or mixtures thereof and the polymeric resin may include an epoxy resin, acrylate resin, polyurethane resin, novolac resin, or mixtures thereof. The silane coating compositions may be either water or solvent based.
    Type: Application
    Filed: March 2, 2006
    Publication date: March 15, 2007
    Inventors: William van Ooij, Karthik Suryanarayanan, Jaspreet Gandhi, Naveen Simhadri, Chetan Shivane, Matthew Stacy, Danqing Zhu