Patents by Inventor Javier Antonio Valle-Mayorga

Javier Antonio Valle-Mayorga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11088047
    Abstract: A hermetic ceramic package for high current signals includes a substrate made of a plurality of ceramic green sheets that form an upper body portion having an upper surface and a lower body portion having a lower surface and an intermediate surface between the upper surface and the lower surface. A first conductive plate is formed on the intermediate surface and a first plurality of conductive pad vias are formed in the lower body portion, extending from the first conductive plate to the lower surface of the lower body portion. A heat sink if coupled to the lower surface of the lower body portion and a first conductive pad also coupled to the lower surface such that the first conductive pad is electrically coupled to the first plurality of conductive pad vias.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: August 10, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Joao Carlos Felicio Brito, Javier Antonio Valle Mayorga, Hector Torres
  • Publication number: 20200043825
    Abstract: A hermetic ceramic package for high current signals includes a substrate made of a plurality of ceramic green sheets that form an upper body portion having an upper surface and a lower body portion having a lower surface and an intermediate surface between the upper surface and the lower surface. A first conductive plate is formed on the intermediate surface and a first plurality of conductive pad vias are formed in the lower body portion, extending from the first conductive plate to the lower surface of the lower body portion. A heat sink if coupled to the lower surface of the lower body portion and a first conductive pad also coupled to the lower surface such that the first conductive pad is electrically coupled to the first plurality of conductive pad vias.
    Type: Application
    Filed: February 5, 2019
    Publication date: February 6, 2020
    Inventors: Joao Carlos Felicio Brito, Javier Antonio Valle Mayorga, Hector Torres
  • Patent number: 8643407
    Abstract: A half bridge gate driving circuit for providing gate driving circuits in a bi-hecto celcius (200 degrees celcius) operating environment having multiple functions including combinations of multiple level logic inputs, noise immunity, fault protection, overlap protection, pulse modulation, high-frequency modulation with transformer based isolation, high-frequency demodulation back to pulse width modulation, deadtime generator, level shifter for high side transistor, overcurrent protection, and undervoltage lockout.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: February 4, 2014
    Inventors: Brad Alan Reese, Javier Antonio Valle-Mayorga, Ivonne Escorcia-Carranza, Khoa Minh Phan, Caleb Paul Gutshall, Roberto Marcelo Schupbach
  • Publication number: 20130009674
    Abstract: A half bridge gate driving circuit for providing gate driving circuits in a bi-hecto celcius (200 degrees celcius) operating environment having multiple functions including combinations of multiple level logic inputs, noise immunity, fault protection, overlap protection, pulse modulation, high-frequency modulation with transformer based isolation, high-frequency demodulation back to pulse width modulation, deadtime generator, level shifter for high side transistor, overcurrent protection, and undervoltage lockout.
    Type: Application
    Filed: June 22, 2012
    Publication date: January 10, 2013
    Inventors: Brad Alan Reese, Javier Antonio Valle-Mayorga, Ivonne Escorcia-Carranza, Khoa Minh Phan, Caleb Paul Gutshall, Roberto Marcelo Schupbach