Abstract: Vest panels are constructed with outwardly exposed Velcro material (hook and loop) panels and 1? interval sewn webbing to create an attachment system (MOLLE) that allows items to be attached to the outside of the front and back piece plate holders. The closure flap holding the hard armor plate inserts are lined with “SPECTRA” ballistic fabric which resists wearing on the flap from the inside, making it more secure. Hook and loop fastening is used to secure the top and bottom of the armor plate insert flap assembly for secure closure. The front and back sections of the vest are attached one to the other at the shoulder with adjustable straps using hook and loop overlapped lengths to form a “clam shell” unit. Protective soft gear is placed in the inwardly oriented mesh pocket of the vest, and armor plate is placed in the outside pocket.

Abstract: Vest panels are constructed with outwardly exposed Velcro material (hook and loop) panels and 1? interval sewn webbing to create an attachment system (MOLLE) that allows items to be attached to the outside of the front and back piece plate holders. The closure flap holding the hard armor plate inserts are lined with “SPECTRA” ballistic fabric which resists wearing on the flap from the inside, making it more secure. Hook and loop fastening is used to secure the top and bottom of the armor plate insert flap assembly for secure closure. The front and back sections of the vest are attached one to the other at the shoulder with adjustable straps using hook and loop overlapped lengths to form a “clam shell” unit. Protective soft gear is placed in the inwardly oriented mesh pocket of the vest, and armor plate is placed in the outside pocket.

Abstract: A method is provided for reducing size of memory required for a switching node's forwarding table by employing forwarding tables of different types to map received data packets addressed to downstream nodes and upstream nodes to appropriate output ports of the switching node. The method includes receiving a data packet at a data transfer node of a network and selecting a forwarding table from multiple types of forwarding tables accessible by the node based on an attribute associated with the received data packet, and mapping the data packet to an output port of the node utilizing the forwarding table selected from the multiple types of forwarding tables based on the attribute associated with the packet.

Abstract: Efficient, reliable broadcast support is provided to clients of a network built using switching elements that have the capability to replicate packets. Replication patterns are generated and used in broadcasting data in the network. The replication patterns are provided in hardware of the network to enable broadcasting from one node in the network to each node of a broadcast domain of the network.

Abstract: Method, system and program product are provided for reducing size of memory required for a switching node's forwarding table by employing forwarding tables of different types to map received data packets addressed to downstream nodes and upstream nodes to appropriate output ports of the switching node. The method includes receiving a data packet at a data transfer node of a network and selecting a forwarding table from multiple types of forwarding tables accessible by the node based on an attribute associated with the received data packet, and mapping the data packet to an output port of the node utilizing the forwarding table selected from the multiple types of forwarding tables based on the attribute associated with the packet.

Abstract: A testing method is provided which includes verifying at least one external signal path of an electronic package environment by testing an input/output (I/O) circuit of an integrated circuit of the electronic package environment with a logic built-in self-test (LBIST) of the integrated circuit, wherein the external signal path being verified is electrically coupled to the tested I/O circuit. A result of verifying of the at least one external signal path is manifested in the integrated circuit's signature, which characterizes a response of the I/O circuit to the LBIST. In another aspect, the verifying of the at least one external signal path includes concurrently testing another I/O circuit of another integrated circuit, which is also electrically coupled to the external signal path.

Abstract: A method of controlling test data with a boundary latch module having a plurality of latches to facilitate logic built-in self-testing of an integrated circuit (IC) is provided which includes providing a plurality of selection devices for selecting initialization data to store in the plurality of latches of the IC's boundary latch module. The initialization data is selected from a plurality of scan paths of the integrated circuit, and the initialization data from at least one of the latches is provided as input to a logic circuit of the IC or output of the IC. In another aspect, the method includes selecting a datum from an external input or test-pattern generator of the integrated circuit for capture in at least one of the latches and input to a multiple-input signature register, which stores a signature of the integrated circuit resulting from the logic built-in self-testing.

Abstract: Deadlocks are avoided in performing failovers in communications environments that include partnered interfaces. An ordered set of steps are performed to failover from one interface of a partnered interface to another interface of the partnered interface such that deadlocks are avoided.

Abstract: In order to solve the problem of the detection of the arrival of duplicate data packets in an interconnected, multinode data processing system, each data packet is provided with a field of r bits that are randomly generated for each data packet. However, one of the packets is provided with a field that is computed from the other randomly generated field entries in a checksum computation which yields a selected nonzero checksum value. A running checksum at the receiver is used to determine whether or not, after the receipt of the specified number, k, of data packets, a duplicate packet has been received.

Abstract: A series of state transitions is indicative of performance of hardware service actions. A transition from, for instance, a disconnected state to a connected state for a hardware component is indicative of performance of a service action for the hardware component. Detection of this transition is automatic.

Abstract: Network managers are operated in verification mode to facilitate error handling of communications networks. In verification mode, error reporting remains enabled, even for those components of a communications network reporting errors. A step-by-step procedure is provided for handling each type of error that is detected. Subsequent to handling any reported errors, the network manager is removed from verification mode and may be placed in production mode.

Abstract: An exemplary embodiment of the present invention is a method for performing AC self-test on an integrated circuit that includes a system clock for use during normal operation. The method comprises applying a long data capture pulse to a first test register in response to said system clock. An at speed data launch pulse is applied to the first test register in response to said system clock. The data from the first register is input to a logic path in response to applying the at speed data launch pulse to the first test register. An at speed data capture pulse is applied to a second test register in response to the system clock. The output from the logic path is input to the second test register in response to applying the at speed data capture pulse to the second test register. A long data launch pulse is applied to the second test register in response to the system clock. An additional embodiment includes a system for performing AC self-test on an integrated circuit that includes a system clock.

Abstract: A method of controlling test data with a boundary latch module having a plurality of latches to facilitate logic built-in self-testing of an integrated circuit (IC) is provided which includes providing a plurality of selection devices for selecting initialization data to store in the plurality of latches of the IC's boundary latch module. The initialization data is selected from a plurality of scan paths of the integrated circuit, and the initialization data from at least one of the latches is provided as input to a logic circuit of the IC or output of the IC. In another aspect, the method includes selecting a datum from an external input or test-pattern generator of the integrated circuit for capture in at least one of the latches and input to a multiple-input signature register, which stores a signature of the integrated circuit resulting from the logic built-in self-testing.

Abstract: A testing method is provided which includes verifying at least one external signal path of an electronic package environment by testing an input/output (I/O) circuit of an integrated circuit of the electronic package environment with a logic built-in self-test (LBIST) of the integrated circuit, wherein the external signal path being verified is electrically coupled to the tested I/O circuit. A result of verifying of the at least one external signal path is manifested in the integrated circuit's signature, which characterizes a response of the I/O circuit to the LBIST. In another aspect, the verifying of the at least one external signal path includes concurrently testing another I/O circuit of another integrated circuit, which is also electrically coupled to the external signal path.

Abstract: Method, system and program product are provided for packet flow control for a switching node of a data transfer network. The method includes actively managing space allocations in a central queue of a switching node allotted to the ports of the switching node based on the amount of unused space currently available in the central queue. In a further aspect, the method includes separately tracking unallocated space and vacated allocated space, which had been used to buffer packets received by the ports but were vacated since a previous management update due to a packet being removed from the central queue. Each port is offered vacated space that is currently allocated to that port and a quantity of the currently unallocated space in the central queue to distribute to one or more virtual lanes of the port.

Abstract: A technique is provided for simultaneous and/or selective self-testing of internal logic and asynchronous boundaries of an IC having a plurality of clock domains. A clock command is generated by an on product clock generator for each clock domain simultaneously; and an asynchronous receive clock driver provides a programmable delay to a capture clock based on predetermined cycle requirements of the asynchronous boundaries. Asynchronous boundary test requirements are defined exclusively from the perspective of the asynchronous boundary receiver latches, thereby reducing dependencies among clock domains. Advantageously, the design of internal logic and asynchronous boundaries of each clock domain, ultimately residing within an IC, can proceed without a priori knowledge of how the clock domain will eventually be used in aggregation with other clock domains.

Abstract: A scalable LBIST control structure provides for testing of multiple independent clock domains within a chip and/or across multiple chips. The LBIST control structure sequences all clock domains through each step of the LBIST sequence synchronously, allowing multiple clock domains and/or multiple chips to be controlled from a common point.

Abstract: Method, system and program product are provided for reducing size of memory required for a switching node's forwarding table by employing forwarding tables of different types to map received data packets addressed to downstream nodes and upstream nodes to appropriate output ports of the switching node. The method includes receiving a data packet at a data transfer node of a network and selecting a forwarding table from multiple types of forwarding tables accessible by the node based on an attribute associated with the received data packet, and mapping the data packet to an output port of the node utilizing the forwarding table selected from the multiple types of forwarding tables based on the attribute associated with the packet.

Abstract: A system and method are provided in which communication adapters, which are used for the transfer of message packets from and amongst a plurality of data processing nodes, are provided with internal storage which is used to indicate the status of a particular adapter as a master, as a slave or as a backup up adapter. This information provides the adapters with the ability to be called into service to take over the operations of another adapter in the event of node or adapter failure.

Abstract: A system and method is provided for synchronizing time of day information between and among communication adapters. Time of day information, which is desired for proper message packet ordering and delivery, is recovered in a process in which a master adapter, connected to a master node, periodically broadcasts current time of day information to slave adapters which operate to determine whether or not drift correction is to be applied.