Abstract: An apparatus includes an interface configured to obtain data associated with multiple cables coupled to or forming a part of a redundant token bus control network. The apparatus also includes a traffic detector configured to determine whether valid data traffic is being received over the cables from the redundant token bus control network based on the data. The apparatus further includes at least one processing device configured to determine whether one or more of the cables has experienced a network fault or a return from a network fault based on the determination of whether valid data traffic is being received over the cables. The at least one processing device is also configured, in response to determining that one or more of the cables has experienced a network fault or a return from a network fault, to generate a notification that identifies the apparatus and the one or more cables and output the notification.

Abstract: An apparatus includes first hardware configured to communicate, via a first interface, over a supervisory control network with one or more components of an industrial process control and automation system. The apparatus also includes second hardware configured to communicate, via a second interface, with a computing platform that virtualizes at least one other component of the industrial process control and automation system. The apparatus further includes a third interface configured to transport information between the first and second hardware.

Abstract: An apparatus includes an interface configured to obtain data associated with multiple cables coupled to or forming a part of a redundant token bus control network. The apparatus also includes a traffic detector configured to determine whether valid data traffic is being received over the cables from the redundant token bus control network based on the data. The apparatus further includes at least one processing device configured to determine whether one or more of the cables has experienced a network fault or a return from a network fault based on the determination of whether valid data traffic is being received over the cables. The at least one processing device is also configured, in response to determining that one or more of the cables has experienced a network fault or a return from a network fault, to generate a notification that identifies the apparatus and the one or more cables and output the notification.

Abstract: A method for bus bridging includes providing a bus interface device that is coupled between at least one module bus and at least one advanced extensible interface (AXI) bus for translating bus requests between the module bus and the AXI bus. The bus interface device includes logic. The logic is configured to receive a read/write (R/W) request that is one of a module bus protocol R/W request and an AXI bus protocol R/W request and to buffer the R/W request to provide a buffered R/W request. The logic translates the buffered R/W request to a first AXI protocol conforming request if the buffered R/W request is the module bus protocol R/W request and translates the buffered R/W request to a first module bus protocol conforming request if the buffered R/W request is the AXI bus protocol R/W request. The translated requests are transmitted to their respective bus.

Abstract: An apparatus includes a first network controller configured to communicate over a higher-level industrial process control network, a second network controller configured to communicate over a first lower-level industrial process control network, and a third network controller configured to communicate over a second lower-level industrial process control network. The first network controller is configured to provide first data messages from the higher-level control network to the second and third network controllers for transmission over the lower-level control networks. The second and third network controllers are configured to provide second data messages from the lower-level control networks to the first network controller for transmission over the higher-level control network.

Abstract: A method for bus bridging includes providing a bus interface device that is coupled between at least one module bus and at least one advanced extensible interface (AXI) bus for translating bus requests between the module bus and the AXI bus. The bus interface device includes logic. The logic is configured to receive a read/write (R/W) request that is one of a module bus protocol R/W request and an AXI bus protocol R/W request and to buffer the R/W request to provide a buffered R/W request. The logic translates the buffered R/W request to a first AXI protocol conforming request if the buffered R/W request is the module bus protocol R/W request and translates the buffered R/W request to a first module bus protocol conforming request if the buffered R/W request is the AXI bus protocol R/W request. The translated requests are transmitted to their respective bus.

Abstract: An apparatus includes a first network controller configured to communicate over a higher-level industrial process control network, a second network controller configured to communicate over a first lower-level industrial process control network, and a third network controller configured to communicate over a second lower-level industrial process control network. The first network controller is configured to provide first data messages from the higher-level control network to the second and third network controllers for transmission over the lower-level control networks. The second and third network controllers are configured to provide second data messages from the lower-level control networks to the first network controller for transmission over the higher-level control network.

Abstract: An apparatus includes first hardware configured to communicate, via a first interface, over a supervisory control network with one or more components of an industrial process control and automation system. The apparatus also includes second hardware configured to communicate, via a second interface, with a computing platform that virtualizes at least one other component of the industrial process control and automation system. The apparatus further includes a third interface configured to transport information between the first and second hardware.

Abstract: A method includes receiving traffic through a first interface in a first group of interfaces at a switch. The first group of interfaces is associated with a first virtual network. The method also includes determining that the traffic is destined for a destination associated with a second virtual network and forwarding the traffic to a second interface in a second group of interfaces at the switch. The second group of interfaces is associated with the second virtual network. The method further includes filtering the traffic that is received at the second interface in the second group of interfaces and communicating the filtered traffic towards the destination. The first and second virtual networks could represent Virtual Local Area Networks associated with different network levels of a process control system.

Abstract: A method includes receiving user input associated with configuration of a configurable device. The method also includes retrieving a template associated with the configurable device. The method further includes generating one or more configuration commands for the configurable device using the template and the user input. In addition, the method includes storing the commands and/or outputting the commands. The method could also include retrieving one or more rules associated with the configuration of the configurable device. The one or more rules could define at least one allowable configuration of the configurable device. Also, the user input could include one or more selections associated with one or more configuration options by a user, and the one or more rules could define the one or more configuration options available for selection by the user. The configurable device could represent a switch, a router, or other command-line configurable device.

Abstract: Devices, systems and methods for network traffic monitoring for a process control network are disclosed. The exemplary system may include a connection to a physical media and a connection to a media access controller of the process control network. The system may also include a filter having a position identifier, a data comparator, a counter, and an access controller. The position identifier may determine the position of relevant data within a packet. The data comparator may compare the relevant data to predetermined criterion. The counter may count the amount of packets transmitted to the media access controller that do not match the predetermined criterion during a specified period. The access controller may pass packets to the media access controller if the relevant data matches the predetermined criterion or a predetermined amount of packets have not been transmitted.

Abstract: A device that recognizes the time synchronization packet and substitutes a real-time value from the master internal counter into the proper place in a data packet is placed between an Ethernet Media Access Controller (MAC) and a Physical Interface Transceiver (PHY). A second device monitors the packet passing from the MAC to the PHY and determines when it is a time synchronization packet from the time master. Upon recognition of the proper packet, the second device simultaneously captures the master's time value and captures the value of a local real-time clock. The result of these captures are presented to the local host computer which controls the time base clock that increments the local real-time clock to either speed up or slow down this local clock, thereby synchronizing the local clock to the time master clock. The offset and skew of the local clock to the master clock is reduced to only the network latency plus variability due to network congestion.

Abstract: The present invention provides a method and apparatus for facilitating communication with non-fault tolerant network nodes in a fault-tolerant network environment. In various embodiments, a network address or network location of any network nodes present on a network that are not fault-tolerant is determined and stored, and data intended for the detected non-fault-tolerant network nodes is routed only over that network to which the non-fault-tolerant network node is connected. In further embodiments, the fault-tolerant network comprises a primary and redundant network with fault tolerant network nodes that are attached to each network; a non-fault-tolerant network node that is attached to either the primary or redundant network is then operable to communicate with any fault-tolerant network node via data sent over only the network to which the non-fault-tolerant network node is connected.

Abstract: A device that recognizes the time synchronization packet and substitutes a real-time value from the master internal counter into the proper place in a data packet is placed between an Ethernet Media Access Controller (MAC) and a Physical Interface Transceiver (PHY). A second device monitors the packet passing from the MAC to the PHY and determines when it is a time synchronization packet from the time master. Upon recognition of the proper packet, the second device simultaneously captures the master's time value and captures the value of a local real-time clock. The result of these captures are presented to the local host computer which controls the time base clock that increments the local real-time clock to either speed up or slow down this local clock, thereby synchronizing the local clock to the time master clock. The offset and skew of the local clock to the master clock is reduced to only the network latency plus variability due to network congestion.

Abstract: The present invention provides a method of operating a computer network with fault-tolerant nodes, comprising determining the state of a first and second link between fault-tolerant nodes and other network nodes. Data sent by the fault-tolerant node to other nodes may then be sent over a link that is selected based on the state of the first and second links. In some embodiments of the invention this takes place in an intermediate node in a network, which receives data from an originating node and forwards it to a destination node via a link selected based on the state of the first and second links.

Abstract: A system for, and method of, emulating, on a non-native computer, a native environment for a visual display object file for a real time process control system and a real time process control system employing the emulator. The visual display object file contains a drawing command, an address pointer for communicating data with the real time process control system and a rule for interpreting data received from a touch-sensitive screen.

Abstract: A module of a distributed process control system has a prior art kernel submodule, a peripheral submodule, and an interface circuit to provide for communications between the two submodules. The kernel submodule communicates with the interface circuit over a module BUS which includes a data BUS and an address BUS. The peripheral submodule communicates with the interface circuit over a peripheral component interface (PCI) BUS, a single thirty two bit BUS which is incompatible with the module BUS. The interface circuit permits such communications between the two submodules without requiring any hardware or software changes to the kernel submodule and the module BUS, nor to components of the peripheral submodule or its PCI BUS. The interface circuit includes interface registers, a control circuit which determines which submodule is permitted to write or read data and/or address into or from a given register of the interface registers.

Abstract: A control circuit for the interface circuit of a module of a distributed process control system permits its kernel submodule and peripheral submodule to communicate through the interface circuit notwithstanding that the structure and protocol of module BUS of the kernel submodules is incompatible with the structure and protocol of the PCI BUS of the peripheral submodule. The control circuit includes a module BUS state machine (MBSM), a PCI target state machine (PTSM), an arbiter state machine (ARSM), and an address decode logic (ADL) circuit. In response to control signals from the kernel and peripheral submodules applied to the control circuit over their respective buses, and control signals produced by the MBSM, the PTSM, the ARSM, and the ADL circuit. Which one of the two submodules is granted access to the registers of the interface circuit is determined by the control circuit which also grants the peripheral submodule access through the interface circuit to the memory of the kernel submodule.

Abstract: A memory unit, made up of a plurality of BY-4 memory devices, has a plurality of computer words, each computer word including a predetermined number of data bits and a predetermined number of check bits. An error detection and correction (EDAC) apparatus interfaces with the memory unit for detecting and correcting a single bit error of the computer word, detecting a two bit error of the computer word, and detecting all two, three, and four bit errors of a single memory device. Matrix logic generates the check bits from preselected participating data bits of the data bits of the computer word being fetched. Compare gate logic compares check bits from the memory unit to corresponding check bits generated by the matrix logic to generate syndrome bits.

Abstract: An AGC circuit including a precision voltage clamp and method by which a receiver output voltage may be referenced to virtualy any level desired. The circuit and method of the present invention provide an extremely precise AGC and fast clamp ideal for use in RGB data transmission in a fiber optic receiver.