Abstract: The invention relates to a switching regulator with an error amplifier circuit and a feed-forward circuit. The error amplifier circuit provides an error signal by amplifying the difference between a feedback signal and a reference signal. The feed-forward circuit level-shifts the output of the error amplifier based on the feed-forward input signal and a scaling factor. The resulting adjusted error signal includes both feed-back and feed-forward signal components. A PWM comparator is employed to compare the adjusted error signal to a ramp signal. Switched-mode regulation is performed based on the PWM comparator output. In addition, buck-boost mode transition smoothing circuitry may also be employed to smooth the buck-mode/boost-mode transition in a buck-boost switching regulator.

Abstract: The invention relates to a differential amplifier with internal compensation. The invention also relates to a regulator controller and a regulator which includes such an amplifier. The amplifier includes a preamplifier circuit and a gain circuit. The frequency response of the amplifier is based in part on internal compensation within the preamplifier circuit. The internal compensation of the differential amplifier includes a low frequency zero that is provided by the preamplifier circuit.

Abstract: A current-mode switching regulator is provided. In one embodiment, the regulator is a multi-mode buck-boost regulator that operates as follows. When the operating mode changes, a gain associated with the inner current loop changes, and the loop compensation changes. The inner current loop gain and the loop compensation are adjusted when the operating mode changes such that the post-mode change feedback variable values are roughly the same as the pre-mode change feedback variables values.

Abstract: A buck-boost converter is provided. In buck-boost mode, the converter operates in at least three phases. In one phase, the inductor current ramps upward. In another phase, the inductor current ramps downward. In yet another phase, the inductor current remains at roughly the same non-zero value. Only one pulse-width modulating signal is used in the buck-boost operation. A PWM comparator compares the pulse-width modulating signal with the error signal and trips when the error signal exceeds the pulse-width modulating signal. One of the three phases occurs at the beginning of the clock pulse before the PWM comparator trips. Another of the phases occurs while the PWM comparator is tripped. Yet another of the phases occurs from the time that the PWM goes from tripped to untripped until the beginning of the next clock cycle.

Abstract: Periodically, sensed amplitude for the output signal of a voltage-controlled oscillator is compared to a reference and biasing of the voltage-controlled oscillator is correspondingly set, thereby controlling amplitude of the voltage-controlled oscillator output signal. Process and temperature dependencies of the amplitude are eliminated while achieving low phase noise and large signal-to-noise ratio in the output signal, and consequently low phase noise.

Abstract: A circuit for generating a ramped voltage having controlled maximum amplitude (e.g., for use in a switching controller), and a method for generating such a ramped voltage without use of a comparator. The ramped voltage is a voltage developed across a periodically charged and discharged capacitor, or optionally a level-shifted version of such voltage. Preferably, a ring oscillator generates a clock signal (without use of a comparator) for use in controlling the periodic charging and discharging of the capacitor, and a feedback loop generates a supplemental charging current for the capacitor in response to feedback indicative of the ramped output voltage.

Abstract: A DC-to-DC converter having multiple power delivery channels, and including a current-sharing switching controller implemented as an integrated circuit, multi-channel circuitry (including parallel channels connected to one output node) external to the controller chip, and current sharing circuitry (including circuitry external to the controller chip and circuitry including current mirrors internal to the controller chip), and methods for generating PWM power switch control signals for use in (and performing DC-to-DC conversion using) such a DC-to-DC converter. Preferably, the current sharing circuitry generates individual channel current signals from voltage analogs thereof produced external to the controller chip, and superposes the individual channel current signals to produce an average current signal. Channel current error signals are generated by subtracting the individual channel current signals from the average current signal.

Abstract: A circuit having multiple channels for generating multiple ramped voltage signals (preferably of a type useful in an interleaved PWM dc/dc converter) such that each ramped voltage signal has a different phase, and all the ramped voltage signals have a uniform controlled maximum amplitude. The circuit can be implemented as an integrated circuit (or portion of an integrated circuit) which generates the multiple ramped voltage signals with uniform maximum amplitude in a manner independent of process and temperature variations in implementing and operating such integrated circuit.

Abstract: A method for preparing power factor control integrated circuits which generate linear pulse width modulation (PWM) waveforms is presented. The method of pulse width modulation waveform generation involves providing a capacitor; fast charging the capacitor; and controlling a discharge rate of the capacitor to ensure a constant switching period and a linear PWM waveform. The method is applicable for any single-phase ac/dc converter topology that performs power factor correction. Unlike conventional techniques which utilize three feedback loops, the method of the present invention reduces the total number of feedback loops to two, eliminates input voltage sensing and achieves the same objective. This method results in significant integrated circuit simplification, such as elimination of multiplier, squarer and divider circuits in the control integrated circuit and reduces the cost of the integrated circuit.