Patents by Inventor Jayesh Pakhale

Jayesh Pakhale has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multicore on-die memory microcontroller
    Patent number: 10635526
    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for a multicore on-die memory controller. An integrated circuit device includes an array of non-volatile memory cells and a microcontroller unit. A microcontroller unit includes a plurality of processing units. Different processing units perform different categories of tasks in parallel for an array of non-volatile memory cells.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: April 28, 2020
    Assignee: SanDisk Technologies LLC
    Inventors: Yibo Yin, Henry Zhang, Po-Shen Lai, Vijay Chinchole, Spyridon Georgakis, Yan Li, Hiroyuki Mizukoshi, Toru Miwa, Jayesh Pakhale, Tz-Yi Liu
  • MULTICORE ON-DIE MEMORY MICROCONTROLLER
    Publication number: 20180357123
    Abstract: Apparatuses, systems, methods, and computer program products are disclosed for a multicore on-die memory controller. An integrated circuit device includes an array of non-volatile memory cells and a microcontroller unit. A microcontroller unit includes a plurality of processing units. Different processing units perform different categories of tasks in parallel for an array of non-volatile memory cells.
    Type: Application
    Filed: March 23, 2018
    Publication date: December 13, 2018
    Applicant: SanDisk Technologies LLC
    Inventors: Yibo Yin, Henry Zhang, Po-Shen Lai, Vijay Chinchole, Spyridon Georgakis, Yan Li, Hiroyuki Mizukoshi, Toru Miwa, Jayesh Pakhale, Tz-Yi Liu
  • Command control for multi-core non-volatile memory
    Patent number: 10114589
    Abstract: Apparatuses, systems, and methods are disclosed for controlling commands for non-volatile memory. An apparatus includes one or more memory die. A memory die includes a command/address buffer, an on-die controller, and a plurality of non-volatile memory cores that share a data path. A core includes an array of non-volatile memory cells. A command/address buffer queues command and address information for a plurality of storage operations for one or more non-volatile memory cores. An on-die controller initiates a first unexecuted read operation and a first unexecuted write operation from a command/address buffer in parallel, in response to determining that core dependencies are satisfied for a read operation and a write operation.
    Type: Grant
    Filed: January 17, 2017
    Date of Patent: October 30, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jingwen Ouyang, Greg Hilton, Jayesh Pakhale
  • COMMAND CONTROL FOR MULTI-CORE NON-VOLATILE MEMORY
    Publication number: 20180136877
    Abstract: Apparatuses, systems, and methods are disclosed for controlling commands for non-volatile memory. An apparatus includes one or more memory die. A memory die includes a command/address buffer, an on-die controller, and a plurality of non-volatile memory cores that share a data path. A core includes an array of non-volatile memory cells. A command/address buffer queues command and address information for a plurality of storage operations for one or more non-volatile memory cores. An on-die controller initiates a first unexecuted read operation and a first unexecuted write operation from a command/address buffer in parallel, in response to determining that core dependencies are satisfied for a read operation and a write operation.
    Type: Application
    Filed: January 17, 2017
    Publication date: May 17, 2018
    Applicant: SanDisk Technologies LLC
    Inventors: Jingwen Ouyang, Greg Hilton, Jayesh Pakhale