Abstract: Disclosed herein is a separator for electrochemical devices, configured to guarantee electrical insulation between a positive electrode and a negative electrode, wherein the separator includes no polyolefin substrate, and includes inorganic particles, a binder for coupling between the inorganic particles, and a crosslinking agent.

Abstract: A resonant coil coupled with an electromagnetic field is disclosed. A Fraunhofer resonant coil includes an upper spiral element and a lower spiral element, an upper conical element connected to the upper spiral element and including one or more layers formed of a plurality of plies, a lower conical element connected to the lower spiral element and including one or more layers formed of a plurality of plies, and a feeding device connected to a gap between the upper conical element and the lower conical element and configured to supply power.

Abstract: The present invention relates to a wearable pressure ulcer detection sensor, and the wearable pressure ulcer detection sensor according to the present invention includes a pressure sensor measuring pressure based on a change in capacitance caused by physical force, a temperature sensor measuring temperature based on a change in electrical conductivity due to electron hopping, and an impedance sensor including two electrodes spaced apart from each other and in contact with skin.

Abstract: A radio frequency (RF) weak magnetic field detection sensor includes a ferromagnetic core, a pickup coil disposed to surround the ferromagnetic core, a substrate that includes an opening, a core pad connected to the ferromagnetic core and a coil pad connected to the pickup coil, and an insulating tube interposed between the ferromagnetic core and the pickup coil. The insulating tube includes a bobbin around which the pickup coil is wound, and a core hole formed to pass through the bobbin and configured to accommodate the ferromagnetic core.

Abstract: A semiconductor memory device comprises a substrate, first and second lower electrode groups on the substrate and including a plurality of first and second lower electrodes, respectively, and first and second support patterns on side walls of and connecting each of the first and second lower electrodes, respectively. The first lower electrodes include a first center lower electrode arranged within a hexagonal shape defined by first edge lower electrodes. The second lower electrodes include a second center lower electrode arranged within a hexagonal shape defined by second edge lower electrodes. The first center lower electrode is spaced apart from each of the first edge lower electrodes in different first to third directions. The first support pattern is immediately adjacent to the second support pattern. The first center lower electrode is spaced apart from the second center lower electrode in a fourth direction different from the first to third directions.

Abstract: Disclosed are a method and apparatus for reusing wastewater. The method for reusing wastewater disclosed herein includes: generating a mixed wastewater by mixing multiple types of wastewater (S20); performing a first purification by passing the mixed wastewater through a flocculation-sedimentation unit (S40); performing a second purification by passing an effluent of the flocculation-sedimentation unit through a membrane bioreactor (MBR) (S60); performing a third purification by passing an effluent of the MBR through a reverse-osmosis membrane unit (S80); and reusing an effluent of the reverse-osmosis membrane unit as cooling water or industrial water (S100).

Abstract: A cylindrical secondary battery, a battery pack, and a vehicle are provided. The cylindrical secondary battery includes an electrode assembly having a first electrode tab at a first end of the electrode assembly a battery can configured to accommodate the electrode assembly through an opening portion formed at one side of the battery can, a current collecting plate including three or more tab coupling portions electrically connected to the first electrode tab, and a can coupling portion extending from ends of the tab coupling portions toward the opening portion of the battery can and having a continuous outer peripheral surface electrically connected to an inner surface of the battery can, and a top cap configured to cover the opening portion of the battery can.

Abstract: An apparatus and method for transmitting and receiving magnetic field signals in a magnetic field communication system are provided. The apparatus includes a controller configured to generate a communication signal, matching units that are configured to receive the communication signal and that respectively correspond to different matching frequencies, and loop antennas that are connected to the matching units, respectively, and that are configured to convert communication signals according to the different matching frequencies into magnetic transmission signals in the form of magnetic field energy and to transmit the magnetic transmission signals.

Abstract: A reference voltage generating circuit of a non-volatile ferroelectric memory device includes a temperature compensating control circuit that increases and outputs a level of a signal to a reference capacitor node according to an increase in temperature when a reference control signal is at a high level, a plurality of ferroelectric capacitors connected in parallel, each of first electrodes of the plurality of ferroelectric capacitors are commonly connected to a ground voltage terminal and each of second electrodes of the plurality of ferroelectric capacitors are commonly connected to the reference capacitor node, and a plurality of switching blocks controlled by a reference wordline signal, each having drain terminals commonly connected to the reference capacitor node, source terminals connected to a corresponding bitline.

Abstract: A nonvolatile ferroelectric memory device includes a top cell array block having a first plurality of unit cells, each with a pair of first and second top split wordlines, a bottom cell array block provided with a second plurality of unit cells, each having a pair of first and second bottom split wordlines to correspond to the pair of first and second top split wordlines, a top split wordline driver controlling an output signal transmitted to the first and second top split wordlines of the top cell array block, a bottom split wordline driver controlling an output signal transmitted to the first and second bottom split wordlines of the bottom cell array block, a split wordline driver controller outputting first and second split wordline control signals, and a sensing amplifier arranged for each bitline between the top cell array block and the bottom cell array block.

Abstract: The present invention discloses a magnetic random access memory comprising MRAM cell groups connected in series in forms of an NAND. The MRAM cell groups comprise magnetic tunnel junctions between word lines and P-N diodes, and memory cells for reading and writing data. In the present invention, the cell size can be reduced by comprising MRAM cell arrays wherein one or more MRAM cells are connected in series in forms of an NAND.

Abstract: A nonvolatile ferroelectric memory device and a method for driving the same are disclosed, the device and method devised to stabilize the operation processes and reduce the operation time. The nonvolatile ferroelectric memory device includes a cell array block having a plurality of unit cells being controlled by plate lines and wordlines, a plate line driver being positioned on one side of the cell array block to apply a driving signal to the plate lines, a wordline driver being positioned on the other side of the cell array block to apply a driving signal to the wordlines, a plurality of sub bitlines and main bitlines being arranged on the cell array block in the same direction, and switching control blocks controlling signals applied to the sub bitlines and main bitlines.

Abstract: A nonvolatile ferroelectric memory device includes a plurality of top array blocks disposed along a first direction, each having a plurality of top sub-cell array blocks disposed along a second direction perpendicular to the first direction, each of the top sub-cell array blocks include a first plurality of unit cells, a plurality of bottom array blocks disposed along the first direction below the plurality of top array blocks, each having a plurality of bottom sub-cell array blocks disposed along the second direction, each of the bottom sub-cell array blocks include a second plurality of unit cells, a plurality of sub-bit lines extending along the second direction and disposed at equal first intervals along the first direction, each sub-bit line connected to at least a first end of one of the first and second pluralities of unit cells, and a plurality of main bit lines extending along the second direction and disposed at the equal first intervals along a third direction perpendicular to both the first and se

Abstract: A fail repair circuit of a nonvolatile ferroelectric memory device and a method for repairing the same are disclosed, in which a redundancy time can be reduced and a redundancy algorithm can be changed or added at any time.

Abstract: A ferroelectric memory device includes a plurality of wordlines and a plurality of plate lines, the wordlines and the plate lines being alternately formed at regular intervals in one direction; a plurality of sub bitlines and a plurality of main bitlines, the sub bitlines and the main bitlines alternately formed at regular intervals to cross the wordlines and the plate lines; a plurality of sub cell arrays connected with the wordlines, the sub bitlines and the plate lines, having cells in directions defined by a plurality of rows and columns, the cells in the direction of the rows being arranged every two columns and the cells in the direction of the columns being arranged every two rows, respectively; and switching elements each operating between one of the sub bitlines and one of the main bitlines by an externally applied bitline switch signal of a constant pulse type to selectively connect the sub bitline with the main bitline.

Abstract: A nonvolatile ferroelectric memory includes a top cell array block and a bottom cell array block, each array block having sub cell array blocks, each sub cell array block having a plurality of unit cells; a plurality of main bitlines arranged in one direction in correspondence to a column unit of the sub cell array blocks; a plurality of sub bitlines each connected to one terminal of one of the plurality of unit cells arranged in a same direction as the one direction of the main bitlines; a sense amplifier block having sense amplifiers between the top cell array block and the bottom cell array block, each sense amplifier for amplifying a signal from the main bitline; sub bitline first switch signal application lines and sub bitline second switch signal application lines for controlling connection of the sub bitlines and the main bitlines, sub bitline pull up signal application lines for controlling pull up of the sub bitlines by a self boost operation, and sub bitline pull down signal application lines for se

Abstract: Disclosed is an apparatus and method for driving a ferroelectric memory that can secure an enough read/write cycle time of a corresponding address during a chip is driven.

Abstract: A column repair circuit in a non-volatile ferroelectric memory having main columns and redundancy columns includes a data input/output buffer part for data input/output between the non-volatile ferroelectric memory and an external circuit, a failed column coding part for controlling the main columns and the redundancy columns and connected in response to a failed column address signal to one of main input/output lines in the input/output buffer part and redundancy input/output lines, a repair column adjusting circuit part connected to the failed column coding part for providing a redundancy mode control signal, a data bus amplifying part for amplifying data between the main input/output lines and the main columns to control read/write operation, and a redundancy data bus amplifying part for amplifying data between the redundancy input/output lines and the redundancy columns in response to the redundancy mode control signal.

Abstract: A fail repair circuit of a nonvolatile ferroelectric memory device and a method for repairing the same are disclosed, in which a redundancy time can be reduced and a redundancy algorithm can be changed or added at any time.

Abstract: A nonvolatile ferroelectric memory device includes a first cell array block and a second cell array block, each divided into an upper part and a lower part; sensing amplifiers arranged one by one on multiple bit lines at a middle portion between the first cell array block and the second cell array block; a data I/O encoder connected to end portions of the multiple bit lines for outputting multi-bit signals by encoding outputs of the sensing amplifiers; and a first reference cell array block and a second reference cell array block arranged between the first cell array block and the data I/O encoder and between the second cell array block and the data I/O encoder.