Patents by Inventor Jea-gun Park

Jea-gun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6676753
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere comprising ammonia (NH3) and argon (Ar) at temperatures below about 1200° C.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: January 13, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jea-gun Park
  • Publication number: 20030068890
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere comprising ammonia (NH3) and argon (Ar) at temperatures below about 1200° C.
    Type: Application
    Filed: September 4, 2002
    Publication date: April 10, 2003
    Inventor: Jea-Gun Park
  • Publication number: 20030044622
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere comprising ammonia (NH3) and argon (Ar) at temperatures below about 1200° C.
    Type: Application
    Filed: September 4, 2002
    Publication date: March 6, 2003
    Inventor: Jea-Gun Park
  • Publication number: 20030022003
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere containing nitrogen (N2) and argon (Ar) or N2 and hydrogen (H2), in a donor killing step during a wafering process.
    Type: Application
    Filed: August 13, 2002
    Publication date: January 30, 2003
    Inventor: Jea-gun Park
  • Patent number: 6503594
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere comprising ammonia (NH3) and argon (Ar) at temperatures below about 1200° C.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: January 7, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jea-gun Park
  • Patent number: 6485807
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere containing nitrogen (N2) and argon (Ar) or N2 and hydrogen (H2), in a donor killing step during a wafering process.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: November 26, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jea-gun Park
  • Patent number: 6472040
    Abstract: A silicon ingot is manufactured in a hot zone furnace by pulling the ingot from a silicon melt in the hot zone furnace in an axial direction, at a pull rate profile of the ingot from the silicon melt in the hot zone furnace that is sufficiently high so as to prevent interstitial agglomerates but is sufficiently low so as to confine vacancy agglomerates to a vacancy rich region at the axis of the ingot. The ingot so pulled is sliced into a plurality of semi-pure wafers each having a vacancy rich region at the center thereof that includes vacancy agglomerates and a pure region between the vacancy rich region and the wafer edge that is free of vacancy agglomerates and interstitial agglomerates.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: October 29, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jea-gun Park, Kyoo-chul Cho, Gon-sub Lee
  • Patent number: 6409833
    Abstract: Heat shields for Czochralski pullers include a ring-shaped heat shield housing comprising inner and outer heat shield housing walls and an oblique heat shield housing floor and a heat shield housing roof that extend between the inner and outer heat shield housing walls. The heat shield housing contains insulating material therein. A support member is configured to support the heat shield housing within the crucible in a Czochralski puller. In one embodiment, the support member includes at least one support arm that extends to the ring-shaped heat shield housing. The at least one support arm may be hollow and may contain insulating material therein. In another embodiment, the support member is a ring-shaped support member. The ringshaped support member may include inner and outer support member walls containing insulating material therebetween. The ring-shaped support member may also include at least one window therein. The ring-shaped member may be oblique.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: June 25, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jea-gun Park
  • Publication number: 20010055689
    Abstract: A silicon wafer is provided having controlled distribution of defects, in which denuded zones having a sufficient depth inward from the surface of the wafer are combined with a high gettering effect in a bulk region of the wafer. In the silicon wafer, oxygen precipitates, which act as intrinsic gettering sites, show vertical distribution. The oxygen precipitate concentration profile from the top to the bottom surfaces of the wafer includes first and second peaks at first and second predetermined depths from the top and bottom surfaces of the wafer, denuded zones between the top and bottom surfaces of the wafer and each of the first and second peaks, and a concave region between the first and second peaks, which corresponds to a bulk region of the wafer. For such an oxygen precipitate concentration profile, the wafer is exposed to a rapid thermal annealing process in a gas mixture atmosphere comprising ammonia (NH3) and argon (Ar) at temperatures below about 1200° C.
    Type: Application
    Filed: June 28, 2001
    Publication date: December 27, 2001
    Inventor: Jea-gun Park
  • Patent number: 6170235
    Abstract: A wafer packaging method in which a wafer is placed into a packaging bag that is sealed before the concentration of sulphuric oxide on the surface of the wafer reaches 3×1012 atoms/cm2.
    Type: Grant
    Filed: December 7, 1998
    Date of Patent: January 9, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoo-chul Cho, Jea-gun Park, Sung-hoon Cho
  • Patent number: 6045610
    Abstract: A silicon ingot is manufactured in a hot zone furnace by pulling the ingot from a silicon melt in the hot zone furnace in an axial direction, at a pull rate profile of the ingot from the silicon melt in the hot zone furnace that is sufficiently high so as to prevent interstitial agglomerates but is sufficiently low so as to confine vacancy agglomerates to a vacancy rich region at the axis of the ingot. The ingot so pulled is sliced into a plurality of semi-pure wafers each having a vacancy rich region at the center thereof that includes vacancy agglomerates and a pure region between the vacancy rich region and the wafer edge that is free of vacancy agglomerates and interstitial agglomerates.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: April 4, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jea-gun Park, Kyoo-chul Cho, Gon-sub Lee