Patents by Inventor JEAN-FRANÇOIS DE MARNEFFE
JEAN-FRANÇOIS DE MARNEFFE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11495490Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.Type: GrantFiled: December 30, 2020Date of Patent: November 8, 2022Assignee: TOKYO ELECTRON LIMITEDInventors: Koichi Yatsuda, Tatsuya Yamaguchi, Yannick Feurprier, Frederic Lazzarino, Jean-Francois de Marneffe, Khashayar Babaei Gavan
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Publication number: 20220181145Abstract: A method for improving a bias temperature instability of a SiO2 layer comprises exposing the SiO2 layer to atomic hydrogen.Type: ApplicationFiled: July 7, 2021Publication date: June 9, 2022Inventors: Jacopo Franco, Jean-Francois de Marneffe, Tibor Grasser
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Patent number: 11056376Abstract: In a first aspect, the present disclosure relates to a method for removing an organic sacrificial material from a 2D material, comprising: providing a target substrate having thereon the 2D material and a layer of the organic sacrificial material over the 2D material, infiltrating the organic sacrificial material with a metal or ceramic material, and removing the organic sacrificial material.Type: GrantFiled: November 5, 2019Date of Patent: July 6, 2021Assignee: IMEC VZWInventors: Boon Teik Chan, Jean-Francois de Marneffe, Daniil Marinov, Han Chung Lin, Inge Asselberghs
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Publication number: 20210118727Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.Type: ApplicationFiled: December 30, 2020Publication date: April 22, 2021Inventors: Koichi YATSUDA, Tatsuya YAMAGUCHI, Yannick FEURPRIER, Frederic LAZZARINO, Jean-Francois de MARNEFFE, Khashayar BABAEI GAVAN
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Patent number: 10910259Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.Type: GrantFiled: December 7, 2018Date of Patent: February 2, 2021Assignees: TOKYO ELECTRON LIMITED, IMEC VZWInventors: Koichi Yatsuda, Tatsuya Yamaguchi, Yannick Feurprier, Frederic Lazzarino, Jean-Francois de Marneffe, Khashayar Babaei Gavan
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Publication number: 20200395221Abstract: A method of an embodiment includes (i) a step of supplying a first gas to a chamber, wherein the first gas is perfiuorotetraglyme gas, and (ii) a step of generating plasma of a second gas for etching of a porous film in order to etch the porous film at the same time as the step of supplying a first gas or after the step of supplying a first gas. Partial pressure of the first gas in the chamber or pressure of the first gas in the chamber when only the first gas is supplied to the chamber is higher than critical pressure causing capillary condensation of the first gas in the porous film and is lower than saturated vapor pressure of the first gas at a temperature of the workpiece during execution of the step of supplying a first gas.Type: ApplicationFiled: May 9, 2018Publication date: December 17, 2020Applicants: Tokyo Electron Limited, L'Air Liquide Societe Anonyme Pour L'Etude Et L'Exploitation Des Procedes Georges Claude, UNIVERSITE D'ORLEANS, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUEInventors: Shigeru TAHARA, Keiichiro URABE, Peng SHEN, Christian DUSSARRAT, Jean-Francois DE MARNEFFE, Remi DUSSART, Thomas TILLOCHER
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Publication number: 20200144094Abstract: In a first aspect, the present disclosure relates to a method for removing an organic sacrificial material from a 2D material, comprising: providing a target substrate having thereon the 2D material and a layer of the organic sacrificial material over the 2D material, infiltrating the organic sacrificial material with a metal or ceramic material, and removing the organic sacrificial material.Type: ApplicationFiled: November 5, 2019Publication date: May 7, 2020Inventors: Boon Teik Chan, Jean-Francois de Marneffe, Daniil Marinov, Han Chung Lin, Inge Asselberghs
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Publication number: 20190271660Abstract: The disclosed technology generally relates to a method of forming a nanoscale opening in a semiconductor structure, and more particularly to forming a nanoscale opening that can be used for sensing the presence of polymers, e.g., the individual bases of deoxyribonucleic acid (DNA) or ribonucleic acid (RNA). In one aspect, a method of forming a nanopore in a semiconductor fin includes providing a fin structure comprising a bottom layer and a top layer, pattering the top layer to form a pillar, and laterally embedding the pillar in a filler material. The method additionally includes forming an aperture in the filler material by removing the pillar, and forming the nanopore in the bottom layer by etching through the aperture. In another aspect, a semiconductor fin is fabricated using the method.Type: ApplicationFiled: March 4, 2019Publication date: September 5, 2019Inventors: Boon Teik Chan, Zheng Tao, Jean-Francois de Marneffe, Chang Chen
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Publication number: 20190181039Abstract: A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.Type: ApplicationFiled: December 7, 2018Publication date: June 13, 2019Inventors: Koichi YATSUDA, Tatsuya YAMAGUCHI, Yannick FEURPRIER, Frederic LAZZARINO, Jean-Francois de MARNEFFE, Khashayar BABAEI GAVAN
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Patent number: 10236162Abstract: A method of etching a porous film is provided. The method includes supplying a first gas into a processing chamber of a plasma processing apparatus in which an object to be processed including a porous film is accommodated, and generating a plasma of a second gas for etching the porous film in the processing chamber. The first gas is a processing gas having a saturated vapor pressure of less than or equal to 133.3 Pa at a temperature of a stage on which the object is mounted in the processing chamber, or includes the processing gas. In the step of supplying the first gas, no plasma is generated, and a partial pressure of the processing gas which is supplied into the processing chamber is set to be greater than or equal to 20% of the saturated vapor pressure.Type: GrantFiled: November 29, 2017Date of Patent: March 19, 2019Assignee: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Eiichi Nishimura, Mikhail Baklanov, Liping Zhang, Jean-Francois de Marneffe
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Publication number: 20190057859Abstract: In one aspect, the present disclosure relates to a method. The method includes providing a substrate having a patterned layer thereon, the patterned layer including an opening that exposes the substrate. The method also includes selectively infiltrating the patterned layer with a metal or ceramic material, thereby reducing a dimension of the opening. The opening exposes the substrate after the dimension of the opening is reduced.Type: ApplicationFiled: August 14, 2018Publication date: February 21, 2019Applicant: IMEC VZWInventors: Boon Teik Chan, Jean-Francois de Marneffe
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Publication number: 20180082823Abstract: A method of etching a porous film is provided. The method includes supplying a first gas into a processing chamber of a plasma processing apparatus in which an object to be processed including a porous film is accommodated, and generating a plasma of a second gas for etching the porous film in the processing chamber. The first gas is a processing gas having a saturated vapor pressure of less than or equal to 133.3 Pa at a temperature of a stage on which the object is mounted in the processing chamber, or includes the processing gas. In the step of supplying the first gas, no plasma is generated, and a partial pressure of the processing gas which is supplied into the processing chamber is set to be greater than or equal to 20% of the saturated vapor pressure.Type: ApplicationFiled: November 29, 2017Publication date: March 22, 2018Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru TAHARA, Eiichi NISHIMURA, Mikhaïl BAKLANOV, Liping ZHANG, Jean-Francois de Marneffe
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Patent number: 9859102Abstract: A method of etching a porous film is provided. The method includes supplying a first gas into a processing chamber of a plasma processing apparatus in which an object to be processed including a porous film is accommodated, and generating a plasma of a second gas for etching the porous film in the processing chamber. The first gas is a processing gas having a saturated vapor pressure of less than or equal to 133.3 Pa at a temperature of a stage on which the object is mounted in the processing chamber, or includes the processing gas. In the step of supplying the first gas, no plasma is generated, and a partial pressure of the processing gas which is supplied into the processing chamber is set to be greater than or equal to 20% of the saturated vapor pressure.Type: GrantFiled: April 18, 2016Date of Patent: January 2, 2018Assignee: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Eiichi Nishimura, Mikhail Baklanov, Liping Zhang, Jean-Francois de Marneffe
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Patent number: 9847262Abstract: A method is provided for in-situ monitoring of etch uniformity during plasma etching, on the basis of the detection of interferometry patterns. The method is applicable to a reactor wherein a plasma is created in the area between the surface to be etched and a counter-surface arranged essentially parallel to the surface to be etched. The occurrence of interference patterns is detected at a location that is placed laterally with respect to the area between the surface to be etched and the counter-surface. The presence of an interference pattern at a particular wavelength is observed through the detection of oscillations of the light intensity measured by an optical detector, preferably by the standard Optical Emission Spectrometry tool of the reactor. When these oscillations are no longer detectable, non-uniformity exceeds a pre-defined limit. The counter surface is arranged such that the oscillations are detected.Type: GrantFiled: December 3, 2015Date of Patent: December 19, 2017Assignees: IMEC VZW, Katholeike Universiteit Leuven, KU Leuven R & DInventors: Vladimir Samara, Jean-Francois de Marneffe
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Patent number: 9595422Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to plasma etching of dielectric materials having pores. In one aspect, a method for etching a porous material in an environment includes contacting the porous material with an organic gas at a pressure and a temperature. The organic gas is such that at the pressure and the temperature, the organic gas remains in a gas state when outside of the porous material, while the organic gas condenses into an organic liquid upon contacting the porous material. Upon contacting the porous material, the organic gas thereby fills the pores of the porous material with the organic liquid. Subsequent to contacting the porous material, the method additionally includes plasma etch-treating of the porous material having filled pores, thereby evaporating a fraction of the organic liquid filling the pores of the porous material.Type: GrantFiled: March 16, 2016Date of Patent: March 14, 2017Assignees: IMEC VZW, Katholieke Universiteit LeuvenInventors: Mikhaïl Baklanov, Liping Zhang, Jean-Francois de Marneffe
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Patent number: 9520298Abstract: The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures on a substrate, introducing the substrate in a plasma reactor, and subjecting the substrate to a plasma treatment at a temperature lower than zero degrees Celsius, such as between zero and ?110° C. The plasma treatment may be a H2 plasma treatment performed in an inductively coupled plasma reactor. The treatment time may be at least 30s.Type: GrantFiled: February 7, 2015Date of Patent: December 13, 2016Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&DInventors: Peter De Schepper, Jean-Francois de Marneffe, Efrain Altamirano Sanchez
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Publication number: 20160307732Abstract: A method of etching a porous film is provided. The method includes supplying a first gas into a processing chamber of a plasma processing apparatus in which an object to be processed including a porous film is accommodated, and generating a plasma of a second gas for etching the porous film in the processing chamber. The first gas is a processing gas having a saturated vapor pressure of less than or equal to 133.3 Pa at a temperature of a stage on which the object is mounted in the processing chamber, or includes the processing gas. In the step of supplying the first gas, no plasma is generated, and a partial pressure of the processing gas which is supplied into the processing chamber is set to be greater than or equal to 20% of the saturated vapor pressure.Type: ApplicationFiled: April 18, 2016Publication date: October 20, 2016Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru TAHARA, Eiichi NISHIMURA, Mikhaïl BAKLANOV, Liping ZHANG, Jean-Francois de Marneffe
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Publication number: 20160276133Abstract: The disclosed technology generally relates to semiconductor fabrication, and more particularly to plasma etching of dielectric materials having pores. In one aspect, a method for etching a porous material in an environment includes contacting the porous material with an organic gas at a pressure and a temperature. The organic gas is such that at the pressure and the temperature, the organic gas remains in a gas state when outside of the porous material, while the organic gas condenses into an organic liquid upon contacting the porous material. Upon contacting the porous material, the organic gas thereby fills the pores of the porous material with the organic liquid. Subsequent to contacting the porous material, the method additionally includes plasma etch-treating of the porous material having filled pores, thereby evaporating a fraction of the organic liquid filling the pores of the porous material.Type: ApplicationFiled: March 16, 2016Publication date: September 22, 2016Inventors: Mikhaïl Baklanov, Liping Zhang, Jean-Francois de Marneffe
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Publication number: 20160181165Abstract: A method is provided for in-situ monitoring of etch uniformity during plasma etching, on the basis of the detection of interferometry patterns. The method is applicable to a reactor wherein a plasma is created in the area between the surface to be etched and a counter-surface arranged essentially parallel to the surface to be etched. The occurrence of interference patterns is detected at a location that is placed laterally with respect to the area between the surface to be etched and the counter-surface. The presence of an interference pattern at a particular wavelength is observed through the detection of oscillations of the light intensity measured by an optical detector, preferably by the standard Optical Emission Spectrometry tool of the reactor. When these oscillations are no longer detectable, non-uniformity exceeds a pre-defined limit. The counter surface is arranged such that the oscillations are detected.Type: ApplicationFiled: December 3, 2015Publication date: June 23, 2016Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&DInventors: Vladimir Samara, Jean-Francois de Marneffe
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Publication number: 20150228497Abstract: The present disclosure is related to a method for treating a photoresist structure on a substrate, the method comprising producing one or more resist structures on a substrate, introducing the substrate in a plasma reactor, and subjecting the substrate to a plasma treatment at a temperature lower than zero degrees Celsius, such as between zero and ?110° C. The plasma treatment may be a H2 plasma treatment performed in an inductively coupled plasma reactor. The treatment time may be at least 30 s.Type: ApplicationFiled: February 7, 2015Publication date: August 13, 2015Applicants: Katholieke Universiteit Leuven, KU LEUVEN R&D, IMEC VZWInventors: Peter De Schepper, Jean-Francois de Marneffe, Efrain Altamirano Sanchez