Abstract: A device for addressing a cache memory of a motion picture compression circuit, executing series of comparisons to estimate the motion of a current window of pixels of a current picture with respect to a reference window of a preceding picture, includes a first cache memory partitioned into four physical segments of equal size. Each physical segment is adapted to contain one half-macroblock of the reference window, and a circuit for addressing the first cache memory, the addressing being different for a motion estimation related to a current window of even rank and for a motion estimation related to a current window of odd rank.