Abstract: A flip-flop further comprising two branches with MNOS elements serially connected with P channel MOS transistors for permitting a non-volatile storing of the informations comprised in the flip-flop at a chosen storing time. The memorization of the state of the flip-flop can be made in a single cycle by acting on the control signal applied to the gate of the P channel transistors and on the supply voltage of the device. In the same way, the resetting can be made in a single cycle.

Abstract: This invention concerns counters.More specifically, it relates to a non-volatile counting decade, comprising five flipflops, the outputs of which represent the decimal contents of the decade in the Johnson code. In this code, no flipflop changes its state more than twice in the course of a counting cycle from 0 to 10. The state of the counter is safeguarded on every incrementation, in separate safeguard circuits for each flipflop, formed of MNOS or floating-base transistors. However, any flipflop output state is safeguarded only if its state has changed after incrementation, this being detected by a logic circuit, which selects the safeguard signal for each flipflop.By means of an extremely simple combinative circuit, this invention thereby greatly reduces the number of writing cycles to be performed by the MNOS or floating-base transistors, which cannot withstand an excessive number of writing cycles.

Abstract: A flip-flop further comprising two branches with MNOS elements serially connected with P channel MOS transistors for permitting a non-volatile storing of the information contained in a flip-flop at a chosen memorizing time. The memorizing of the state of the flip-flop can be made in a single cycle by raising the supply voltage of the device. In the same way, the resetting can be made in a single cycle by restoring abruptily the power voltage.