Patents by Inventor Jean Patrice Rakotoniaina

Jean Patrice Rakotoniaina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9166071
    Abstract: A polarization resistant solar cell using an oxygen-rich interface layer is provided. The oxygen-rich interface layer may be comprised of SiOxNy, which may have a graded profile that varies between oxygen-rich proximate to the solar cell to nitrogen-rich distal to the solar cell. A silicon oxide passivation layer may be interposed between the solar cell and the SiOxNy graded dielectric layer. The graded SiOxNy dielectric layer may be replaced with a non-graded SiOxNy dielectric layer and a SiN AR coating.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: October 20, 2015
    Assignee: Silicor Materials Inc.
    Inventors: Bill Phan, Renhua Zhang, John Gorman, Omar Sidelkheir, Jean Patrice Rakotoniaina, Alain Paul Blosse, Martin Kaes
  • Patent number: 8679361
    Abstract: The invention relates to a method and device for characterizing wafers during the production of solar cells. Characterizing wafers includes a) providing a wafer and carrying out a production process with the wafer for producing a solar cell or a plurality of solar cells; b) carrying out a wet chemical step with the wafer during the production process, wherein the wet chemical step decreases an influence of the wafer surface on a lifetime of charge carriers in the wafer; c) irradiating the wafer with light for creating the charge carriers in the wafer during the wet chemical step or after the wet chemical step; d) determining the lifetime of the charge carriers created in step c); and e) characterizing the wafer by means of the lifetime determined in step d).
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: March 25, 2014
    Assignee: Q-Cells SE
    Inventors: Jörg Müller, Jörg Isenberg, Jörn Suthues, Martin Bivour, Jean Patrice Rakotoniaina
  • Publication number: 20130291939
    Abstract: The present invention relates to photovoltaic devices such as silicon solar cells. Devices shown exhibit improved low light performance and increased breakdown strength. Reasons for such improvements includes emitter concentration profiles leading to significantly reduced leakage currents.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 7, 2013
    Inventors: Martin Kaes, Gunnar Stiller, Jean Patrice Rakotoniaina, Fritz G. Kirscht, Olivier Laparra, Kamel Ounadjela
  • Patent number: 8316745
    Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: November 27, 2012
    Assignee: Calisolar Inc.
    Inventors: Fritz G. Kirscht, Kamel Ounadjela, Jean Patrice Rakotoniaina, Dieter Linke
  • Publication number: 20120160296
    Abstract: The present invention relates to devices and method for textured semiconductor materials. Devices and methods shown provide a textured surface with properties that provide a high breakdown voltage. The devices and methods of the present invention can be used to make semiconductor substrates for use in photovoltaic applications such as solar cells.
    Type: Application
    Filed: September 30, 2011
    Publication date: June 28, 2012
    Inventors: Olivier Laparra, Paul Schroeder, Jean Patrice Rakotoniaina, Chia-Ming Chang, Omar Sidelkheir, Alain Paul Blosse, Kamel Ounadjela
  • Publication number: 20110094575
    Abstract: A polarization resistant solar cell using an oxygen-rich interface layer is provided. The oxygen-rich interface layer may be comprised of SiOxNy, which may have a graded profile that varies between oxygen-rich proximate to the solar cell to nitrogen-rich distal to the solar cell. A silicon oxide passivation layer may be interposed between the solar cell and the SiOxNy graded dielectric layer. The graded SiOxNy dielectric layer may be replaced with a non-graded SiOxNy dielectric layer and a SiN AR coating.
    Type: Application
    Filed: December 24, 2009
    Publication date: April 28, 2011
    Applicant: Calisolar Inc.
    Inventors: Bill Phan, Renhua Zhang, John Gorman, Omar Sidelkheir, Jean Patrice Rakotoniaina, Alain Paul Blosse, Martin Kaes
  • Patent number: 7887633
    Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: February 15, 2011
    Assignee: Calisolar, Inc.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Anis Jouini, Dieter Linke, Martin Kaes, Jean Patrice Rakotoniaina, Kamel Ounadjela
  • Publication number: 20090308455
    Abstract: Techniques for the formation of silicon ingots and crystals using silicon feedstock of various grades are described. Common feature is adding a predetermined amount of germanium to the melt and performing a crystallization to incorporate germanium into the silicon lattice of respective crystalline silicon materials. Such incorporated germanium results in improvements of respective silicon material characteristics, mainly increased material strength. This leads to positive effects at applying such materials in solar cell manufacturing and at making modules from those solar cells. A silicon material with a germanium concentration in the range (50-200) ppmw demonstrates an increased material strength, where best practical ranges depend on the material quality generated.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 17, 2009
    Applicant: CALISOLAR, INC.
    Inventors: Fritz Kirscht, Vera Abrosimova, Matthias Heuer, Anis Jouini, Dieter Linke, Martin Kaes, Jean Patrice Rakotoniaina, Kamel Ounadjela
  • Publication number: 20090223549
    Abstract: Formation of a solar cell device from upgraded metallurgical grade silicon which has received at least one defect engineering process and including a low contact resistance electrical path. An anti-reflective coating is formed on an emitter layer and back contacts are formed on a back surface of the bulk silicon substrate. This photovoltaic device may be fired to form a back surface field at a temperature sufficiently low to avoid reversal of previous defect engineering processes. The process further forms openings in the anti-reflective coating and a low contact resistance metal layer, such as nickel layer, over the openings in the anti-reflective coating. The process may anneal the low contact resistance metal layer to form n-doped portion and complete an electrically conduct path to the n-doped layer. This low temperature metallization (e.g., <700° C.) supports the use of UMG silicon for the solar device formation without the risk of reversing earlier defect engineering processes.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 10, 2009
    Applicant: CaliSolar, Inc.
    Inventors: Kamel Ounadjela, Jean Patrice Rakotoniaina, Martin Kaes, Dirk Zickermann, Alain Blosse, Abdellatif Zerga, Matthias Heuer, Fritz Kirscht
  • Publication number: 20080087643
    Abstract: The invention relates to a method for characterizing wafers during the production of solar cells, comprising the steps: a) providing a wafer and carrying out a production process with the wafer for producing a solar cell or a plurality of solar cells; b) carrying out a wet chemical step with the wafer during the production process, wherein the wet chemical step decreases an influence of the wafer surface on the lifetime of charge carriers in the wafer; c) irradiating the wafer with light for creating charge carriers in the wafer during the wet chemical step or after the wet chemical step; d) determining the lifetime of the charge carriers created in step c); and e) characterizing the wafer by means of the lifetime determined in step d). In a second aspect, the invention relates to a device for characterizing wafers during the production of solar cells.
    Type: Application
    Filed: October 11, 2007
    Publication date: April 17, 2008
    Applicant: Q-CELLS AG
    Inventors: Jorg Muller, Jorg Isenberg, Jorn Suthues, Martin Bivour, Jean Patrice Rakotoniaina